diff options
29 files changed, 0 insertions, 1257 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 98922f7d2d1..78589a1b0d0 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -439,21 +439,6 @@ config ARCH_IXP4XX help Support for Intel's IXP4XX (XScale) family of processors. -config ARCH_L7200 - bool "LinkUp-L7200" - select CPU_ARM720T - select FIQ - select ARCH_USES_GETTIMEOFFSET - help - Say Y here if you intend to run this kernel on a LinkUp Systems - L7200 Software Development Board which uses an ARM720T processor. - Information on this board can be obtained at: - - <http://www.linkupsys.com/> - - If you have any questions or comments about the Linux kernel port - to this board, send e-mail to <sjhill@cotw.com>. - config ARCH_DOVE bool "Marvell Dove" select PCI @@ -1185,7 +1170,6 @@ source kernel/Kconfig.preempt config HZ int - default 128 if ARCH_L7200 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER default AT91_TIMER_HZ if ARCH_AT91 diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 64ba313724d..bea37a2512e 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -139,7 +139,6 @@ machine-$(CONFIG_ARCH_IXP23XX) := ixp23xx machine-$(CONFIG_ARCH_IXP4XX) := ixp4xx machine-$(CONFIG_ARCH_KIRKWOOD) := kirkwood machine-$(CONFIG_ARCH_KS8695) := ks8695 -machine-$(CONFIG_ARCH_L7200) := l7200 machine-$(CONFIG_ARCH_LH7A40X) := lh7a40x machine-$(CONFIG_ARCH_LOKI) := loki machine-$(CONFIG_ARCH_MMP) := mmp diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 53faa9063a0..7a29301d516 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -19,10 +19,6 @@ ifeq ($(CONFIG_ARCH_SHARK),y) OBJS += head-shark.o ofw-shark.o endif -ifeq ($(CONFIG_ARCH_L7200),y) -OBJS += head-l7200.o -endif - ifeq ($(CONFIG_ARCH_P720T),y) # Borrow this code from SA1100 OBJS += head-sa1100.o diff --git a/arch/arm/boot/compressed/head-l7200.S b/arch/arm/boot/compressed/head-l7200.S deleted file mode 100644 index d0e3b20856c..00000000000 --- a/arch/arm/boot/compressed/head-l7200.S +++ /dev/null @@ -1,29 +0,0 @@ -/* - * linux/arch/arm/boot/compressed/head-l7200.S - * - * Copyright (C) 2000 Steve Hill <sjhill@cotw.com> - * - * Some code borrowed from Nicolas Pitre's 'head-sa1100.S' file. This - * is merged with head.S by the linker. - */ - -#include <asm/mach-types.h> - -#ifndef CONFIG_ARCH_L7200 -#error What am I doing here... -#endif - - .section ".start", "ax" - -__L7200_start: - mov r0, #0x00100000 @ FLASH address of initrd - mov r2, #0xf1000000 @ RAM address of initrd - add r3, r2, #0x00700000 @ Size of initrd -1: - ldmia r0!, {r4, r5, r6, r7} - stmia r2!, {r4, r5, r6, r7} - cmp r2, r3 - ble 1b - - mov r8, #0 @ Zero it out - mov r7, #MACH_TYPE_L7200 @ Set architecture ID diff --git a/arch/arm/configs/lusl7200_defconfig b/arch/arm/configs/lusl7200_defconfig deleted file mode 100644 index 816fc42884c..00000000000 --- a/arch/arm/configs/lusl7200_defconfig +++ /dev/null @@ -1,23 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -# CONFIG_HOTPLUG is not set -CONFIG_MODULES=y -CONFIG_ARCH_L7200=y -# CONFIG_ARM_THUMB is not set -CONFIG_ZBOOT_ROM_TEXT=0x00010000 -CONFIG_ZBOOT_ROM_BSS=0xf03e0000 -CONFIG_ZBOOT_ROM=y -CONFIG_CMDLINE="console=tty0 console=ttyLU1,115200 root=/dev/ram initrd=0xf1000000,0x005dac7b mem=32M" -CONFIG_BINFMT_AOUT=y -CONFIG_BLK_DEV_RAM=y -# CONFIG_INPUT is not set -# CONFIG_SERIO_SERPORT is not set -# CONFIG_VT is not set -CONFIG_SERIAL_NONSTANDARD=y -CONFIG_EXT2_FS=y -CONFIG_DEBUG_USER=y -# CONFIG_CRC32 is not set diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 030ba7219f4..59ff42ddf0a 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -41,7 +41,6 @@ else endif lib-$(CONFIG_ARCH_RPC) += ecard.o io-acorn.o floppydma.o -lib-$(CONFIG_ARCH_L7200) += io-acorn.o lib-$(CONFIG_ARCH_SHARK) += io-shark.o $(obj)/csumpartialcopy.o: $(obj)/csumpartialcopygeneric.S diff --git a/arch/arm/mach-l7200/Makefile b/arch/arm/mach-l7200/Makefile deleted file mode 100644 index 4bd8ebd70e7..00000000000 --- a/arch/arm/mach-l7200/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# Makefile for the linux kernel. -# - -# Object file lists. - -obj-y := core.o -obj-m := -obj-n := -obj- := - diff --git a/arch/arm/mach-l7200/Makefile.boot b/arch/arm/mach-l7200/Makefile.boot deleted file mode 100644 index 6c72ecbe6b6..00000000000 --- a/arch/arm/mach-l7200/Makefile.boot +++ /dev/null @@ -1,2 +0,0 @@ - zreladdr-y := 0xf0008000 - diff --git a/arch/arm/mach-l7200/core.c b/arch/arm/mach-l7200/core.c deleted file mode 100644 index 50d23246d4f..00000000000 --- a/arch/arm/mach-l7200/core.c +++ /dev/null @@ -1,100 +0,0 @@ -/* - * linux/arch/arm/mm/mm-lusl7200.c - * - * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) - * - * Extra MM routines for L7200 architecture - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/irq.h> -#include <linux/device.h> - -#include <asm/types.h> -#include <asm/irq.h> -#include <asm/mach-types.h> -#include <mach/hardware.h> -#include <asm/page.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -/* - * IRQ base register - */ -#define IRQ_BASE (IO_BASE_2 + 0x1000) - -/* - * Normal IRQ registers - */ -#define IRQ_STATUS (*(volatile unsigned long *) (IRQ_BASE + 0x000)) -#define IRQ_RAWSTATUS (*(volatile unsigned long *) (IRQ_BASE + 0x004)) -#define IRQ_ENABLE (*(volatile unsigned long *) (IRQ_BASE + 0x008)) -#define IRQ_ENABLECLEAR (*(volatile unsigned long *) (IRQ_BASE + 0x00c)) -#define IRQ_SOFT (*(volatile unsigned long *) (IRQ_BASE + 0x010)) -#define IRQ_SOURCESEL (*(volatile unsigned long *) (IRQ_BASE + 0x018)) - -/* - * Fast IRQ registers - */ -#define FIQ_STATUS (*(volatile unsigned long *) (IRQ_BASE + 0x100)) -#define FIQ_RAWSTATUS (*(volatile unsigned long *) (IRQ_BASE + 0x104)) -#define FIQ_ENABLE (*(volatile unsigned long *) (IRQ_BASE + 0x108)) -#define FIQ_ENABLECLEAR (*(volatile unsigned long *) (IRQ_BASE + 0x10c)) -#define FIQ_SOFT (*(volatile unsigned long *) (IRQ_BASE + 0x110)) -#define FIQ_SOURCESEL (*(volatile unsigned long *) (IRQ_BASE + 0x118)) - -static void l7200_mask_irq(unsigned int irq) -{ - IRQ_ENABLECLEAR = 1 << irq; -} - -static void l7200_unmask_irq(unsigned int irq) -{ - IRQ_ENABLE = 1 << irq; -} - -static struct irq_chip l7200_irq_chip = { - .ack = l7200_mask_irq, - .mask = l7200_mask_irq, - .unmask = l7200_unmask_irq -}; - -static void __init l7200_init_irq(void) -{ - int irq; - - IRQ_ENABLECLEAR = 0xffffffff; /* clear all interrupt enables */ - FIQ_ENABLECLEAR = 0xffffffff; /* clear all fast interrupt enables */ - - for (irq = 0; irq < NR_IRQS; irq++) { - set_irq_chip(irq, &l7200_irq_chip); - set_irq_flags(irq, IRQF_VALID); - set_irq_handler(irq, handle_level_irq); - } - - init_FIQ(); -} - -static struct map_desc l7200_io_desc[] __initdata = { - { IO_BASE, IO_START, IO_SIZE, MT_DEVICE }, - { IO_BASE_2, IO_START_2, IO_SIZE_2, MT_DEVICE }, - { AUX_BASE, AUX_START, AUX_SIZE, MT_DEVICE }, - { FLASH1_BASE, FLASH1_START, FLASH1_SIZE, MT_DEVICE }, - { FLASH2_BASE, FLASH2_START, FLASH2_SIZE, MT_DEVICE } -}; - -static void __init l7200_map_io(void) -{ - iotable_init(l7200_io_desc, ARRAY_SIZE(l7200_io_desc)); -} - -MACHINE_START(L7200, "LinkUp Systems L7200") - /* Maintainer: Steve Hill / Scott McConnell */ - .phys_io = 0x80040000, - .io_pg_offst = ((0xd0000000) >> 18) & 0xfffc, - .map_io = l7200_map_io, - .init_irq = l7200_init_irq, -MACHINE_END - diff --git a/arch/arm/mach-l7200/include/mach/aux_reg.h b/arch/arm/mach-l7200/include/mach/aux_reg.h deleted file mode 100644 index 4671558cdd5..00000000000 --- a/arch/arm/mach-l7200/include/mach/aux_reg.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * arch/arm/mach-l7200/include/mach/aux_reg.h - * - * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) - * - * Changelog: - * 08-02-2000 SJH Created file - */ -#ifndef _ASM_ARCH_AUXREG_H -#define _ASM_ARCH_AUXREG_H - -#include <mach/hardware.h> - -#define l7200aux_reg *((volatile unsigned int *) (AUX_BASE)) - -/* - * Auxillary register values - */ -#define AUX_CLEAR 0x00000000 -#define AUX_DIAG_LED_ON 0x00000002 -#define AUX_RTS_UART1 0x00000004 -#define AUX_DTR_UART1 0x00000008 -#define AUX_KBD_COLUMN_12_HIGH 0x00000010 -#define AUX_KBD_COLUMN_12_OFF 0x00000020 -#define AUX_KBD_COLUMN_13_HIGH 0x00000040 -#define AUX_KBD_COLUMN_13_OFF 0x00000080 - -#endif diff --git a/arch/arm/mach-l7200/include/mach/debug-macro.S b/arch/arm/mach-l7200/include/mach/debug-macro.S deleted file mode 100644 index b69ed344c7c..00000000000 --- a/arch/arm/mach-l7200/include/mach/debug-macro.S +++ /dev/null @@ -1,40 +0,0 @@ -/* arch/arm/mach-l7200/include/mach/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - - .equ io_virt, IO_BASE - .equ io_phys, IO_START - - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #io_phys @ physical base address - movne \rx, #io_virt @ virtual address - add \rx, \rx, #0x00044000 @ UART1 -@ add \rx, \rx, #0x00045000 @ UART2 - .endm - - .macro senduart,rd,rx - str \rd, [\rx, #0x0] @ UARTDR - .endm - - .macro waituart,rd,rx -1001: ldr \rd, [\rx, #0x18] @ UARTFLG - tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full - bne 1001b - .endm - - .macro busyuart,rd,rx -1001: ldr \rd, [\rx, #0x18] @ UARTFLG - tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy - bne 1001b - .endm diff --git a/arch/arm/mach-l7200/include/mach/entry-macro.S b/arch/arm/mach-l7200/include/mach/entry-macro.S deleted file mode 100644 index 1726d91fc1d..00000000000 --- a/arch/arm/mach-l7200/include/mach/entry-macro.S +++ /dev/null @@ -1,35 +0,0 @@ -/* - * arch/arm/mach-l7200/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for L7200-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include <mach/hardware.h> - - .equ irq_base_addr, IO_BASE_2 - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mov \irqstat, #irq_base_addr @ Virt addr IRQ regs - add \irqstat, \irqstat, #0x00001000 @ Status reg - ldr \irqstat, [\irqstat, #0] @ get interrupts - mov \irqnr, #0 -1001: tst \irqstat, #1 - addeq \irqnr, \irqnr, #1 - moveq \irqstat, \irqstat, lsr #1 - tsteq \irqnr, #32 - beq 1001b - teq \irqnr, #32 - .endm - diff --git a/arch/arm/mach-l7200/include/mach/gp_timers.h b/arch/arm/mach-l7200/include/mach/gp_timers.h deleted file mode 100644 index 2b7086a26b8..00000000000 --- a/arch/arm/mach-l7200/include/mach/gp_timers.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * arch/arm/mach-l7200/include/mach/gp_timers.h - * - * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) - * - * Changelog: - * 07-28-2000 SJH Created file - * 08-02-2000 SJH Used structure for registers - */ -#ifndef _ASM_ARCH_GPTIMERS_H -#define _ASM_ARCH_GPTIMERS_H - -#include <mach/hardware.h> - -/* - * Layout of L7200 general purpose timer registers - */ -struct GPT_Regs { - unsigned int TIMERLOAD; - unsigned int TIMERVALUE; - unsigned int TIMERCONTROL; - unsigned int TIMERCLEAR; -}; - -#define GPT_BASE (IO_BASE_2 + 0x3000) -#define l7200_timer1_regs ((volatile struct GPT_Regs *) (GPT_BASE)) -#define l7200_timer2_regs ((volatile struct GPT_Regs *) (GPT_BASE + 0x20)) - -/* - * General register values - */ -#define GPT_PRESCALE_1 0x00000000 -#define GPT_PRESCALE_16 0x00000004 -#define GPT_PRESCALE_256 0x00000008 -#define GPT_MODE_FREERUN 0x00000000 -#define GPT_MODE_PERIODIC 0x00000040 -#define GPT_ENABLE 0x00000080 -#define GPT_BZTOG 0x00000100 -#define GPT_BZMOD 0x00000200 -#define GPT_LOAD_MASK 0x0000ffff - -#endif diff --git a/arch/arm/mach-l7200/include/mach/gpio.h b/arch/arm/mach-l7200/include/mach/gpio.h deleted file mode 100644 index c7b0a5d7b8b..00000000000 --- a/arch/arm/mach-l7200/include/mach/gpio.h +++ /dev/null @@ -1,105 +0,0 @@ -/****************************************************************************/ -/* - * arch/arm/mach-l7200/include/mach/gpio.h - * - * Registers and helper functions for the L7200 Link-Up Systems - * GPIO. - * - * (C) Copyright 2000, S A McConnell (samcconn@cotw.com) - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -/****************************************************************************/ - -#define GPIO_OFF 0x00005000 /* Offset from IO_START to the GPIO reg's. */ - -/* IO_START and IO_BASE are defined in hardware.h */ - -#define GPIO_START (IO_START_2 + GPIO_OFF) /* Physical addr of the GPIO reg. */ -#define GPIO_BASE (IO_BASE_2 + GPIO_OFF) /* Virtual addr of the GPIO reg. */ - -/* Offsets from the start of the GPIO for all the registers. */ -#define PADR_OFF 0x000 -#define PADDR_OFF 0x004 -#define PASBSR_OFF 0x008 -#define PAEENR_OFF 0x00c -#define PAESNR_OFF 0x010 -#define PAESTR_OFF 0x014 -#define PAIMR_OFF 0x018 -#define PAINT_OFF 0x01c - -#define PBDR_OFF 0x020 -#define PBDDR_OFF 0x024 -#define PBSBSR_OFF 0x028 -#define PBIMR_OFF 0x038 -#define PBINT_OFF 0x03c - -#define PCDR_OFF 0x040 -#define PCDDR_OFF 0x044 -#define PCSBSR_OFF 0x048 -#define PCIMR_OFF 0x058 -#define PCINT_OFF 0x05c - -#define PDDR_OFF 0x060 -#define PDDDR_OFF 0x064 -#define PDSBSR_OFF 0x068 -#define PDEENR_OFF 0x06c -#define PDESNR_OFF 0x070 -#define PDESTR_OFF 0x074 -#define PDIMR_OFF 0x078 -#define PDINT_OFF 0x07c - -#define PEDR_OFF 0x080 -#define PEDDR_OFF 0x084 -#define PESBSR_OFF 0x088 -#define PEEENR_OFF 0x08c -#define PEESNR_OFF 0x090 -#define PEESTR_OFF 0x094 -#define PEIMR_OFF 0x098 -#define PEINT_OFF 0x09c - -/* Define the GPIO registers for use by device drivers and the kernel. */ -#define PADR (*(volatile unsigned long *)(GPIO_BASE+PADR_OFF)) -#define PADDR (*(volatile unsigned long *)(GPIO_BASE+PADDR_OFF)) -#define PASBSR (*(volatile unsigned long *)(GPIO_BASE+PASBSR_OFF)) -#define PAEENR (*(volatile unsigned long *)(GPIO_BASE+PAEENR_OFF)) -#define PAESNR (*(volatile unsigned long *)(GPIO_BASE+PAESNR_OFF)) -#define PAESTR (*(volatile unsigned long *)(GPIO_BASE+PAESTR_OFF)) -#define PAIMR (*(volatile unsigned long *)(GPIO_BASE+PAIMR_OFF)) -#define PAINT (*(volatile unsigned long *)(GPIO_BASE+PAINT_OFF)) - -#define PBDR (*(volatile unsigned long *)(GPIO_BASE+PBDR_OFF)) -#define PBDDR (*(volatile unsigned long *)(GPIO_BASE+PBDDR_OFF)) -#define PBSBSR (*(volatile unsigned long *)(GPIO_BASE+PBSBSR_OFF)) -#define PBIMR (*(volatile unsigned long *)(GPIO_BASE+PBIMR_OFF)) -#define PBINT (*(volatile unsigned long *)(GPIO_BASE+PBINT_OFF)) - -#define PCDR (*(volatile unsigned long *)(GPIO_BASE+PCDR_OFF)) -#define PCDDR (*(volatile unsigned long *)(GPIO_BASE+PCDDR_OFF)) -#define PCSBSR (*(volatile unsigned long *)(GPIO_BASE+PCSBSR_OFF)) -#define PCIMR (*(volatile unsigned long *)(GPIO_BASE+PCIMR_OFF)) -#define PCINT (*(volatile unsigned long *)(GPIO_BASE+PCINT_OFF)) - -#define PDDR (*(volatile unsigned long *)(GPIO_BASE+PDDR_OFF)) -#define PDDDR (*(volatile unsigned long *)(GPIO_BASE+PDDDR_OFF)) -#define PDSBSR (*(volatile unsigned long *)(GPIO_BASE+PDSBSR_OFF)) -#define PDEENR (*(volatile unsigned long *)(GPIO_BASE+PDEENR_OFF)) -#define PDESNR (*(volatile unsigned long *)(GPIO_BASE+PDESNR_OFF)) -#define PDESTR (*(volatile unsigned long *)(GPIO_BASE+PDESTR_OFF)) -#define PDIMR (*(volatile unsigned long *)(GPIO_BASE+PDIMR_OFF)) -#define PDINT (*(volatile unsigned long *)(GPIO_BASE+PDINT_OFF)) - -#define PEDR (*(volatile unsigned long *)(GPIO_BASE+PEDR_OFF)) -#define PEDDR (*(volatile unsigned long *)(GPIO_BASE+PEDDR_OFF)) -#define PESBSR (*(volatile unsigned long *)(GPIO_BASE+PESBSR_OFF)) -#define PEEENR (*(volatile unsigned long *)(GPIO_BASE+PEEENR_OFF)) -#define PEESNR (*(volatile unsigned long *)(GPIO_BASE+PEESNR_OFF)) -#define PEESTR (*(volatile unsigned long *)(GPIO_BASE+PEESTR_OFF)) -#define PEIMR (*(volatile unsigned long *)(GPIO_BASE+PEIMR_OFF)) -#define PEINT (*(volatile unsigned long *)(GPIO_BASE+PEINT_OFF)) - -#define VEE_EN 0x02 -#define BACKLIGHT_EN 0x04 diff --git a/arch/arm/mach-l7200/include/mach/hardware.h b/arch/arm/mach-l7200/include/mach/hardware.h deleted file mode 100644 index c31909cfc25..00000000000 --- a/arch/arm/mach-l7200/include/mach/hardware.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * arch/arm/mach-l7200/include/mach/hardware.h - * - * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net) - * Steve Hill (sjhill@cotw.com) - * - * This file contains the hardware definitions for the - * LinkUp Systems L7200 SOC development board. - * - * Changelog: - * 02-01-2000 RS Created L7200 version, derived from rpc code - * 03-21-2000 SJH Cleaned up file - * 04-21-2000 RS Changed mapping of I/O in virtual space - * 04-25-2000 SJH Removed unused symbols and such - * 05-05-2000 SJH Complete rewrite - * 07-31-2000 SJH Added undocumented debug auxillary port to - * get at last two columns for keyboard driver - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -/* Hardware addresses of major areas. - * *_START is the physical address - * *_SIZE is the size of the region - * *_BASE is the virtual address - */ -#define RAM_START 0xf0000000 -#define RAM_SIZE 0x02000000 -#define RAM_BASE 0xc0000000 - -#define IO_START 0x80000000 /* I/O */ -#define IO_SIZE 0x01000000 -#define IO_BASE 0xd0000000 - -#define IO_START_2 0x90000000 /* I/O */ -#define IO_SIZE_2 0x01000000 -#define IO_BASE_2 0xd1000000 - -#define AUX_START 0x1a000000 /* AUX PORT */ -#define AUX_SIZE 0x01000000 -#define AUX_BASE 0xd2000000 - -#define FLASH1_START 0x00000000 /* FLASH BANK 1 */ -#define FLASH1_SIZE 0x01000000 -#define FLASH1_BASE 0xd3000000 - -#define FLASH2_START 0x10000000 /* FLASH BANK 2 */ -#define FLASH2_SIZE 0x01000000 -#define FLASH2_BASE 0xd4000000 - -#define ISA_START 0x20000000 /* ISA */ -#define ISA_SIZE 0x20000000 -#define ISA_BASE 0xe0000000 - -#define PCIO_BASE IO_BASE - -#endif diff --git a/arch/arm/mach-l7200/include/mach/io.h b/arch/arm/mach-l7200/include/mach/io.h deleted file mode 100644 index a770a89fb70..00000000000 --- a/arch/arm/mach-l7200/include/mach/io.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * arch/arm/mach-l7200/include/mach/io.h - * - * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) - * - * Changelog: - * 03-21-2000 SJH Created from arch/arm/mach-nexuspci/include/mach/io.h - * 08-31-2000 SJH Added in IO functions necessary for new drivers - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * There are not real ISA nor PCI buses, so we fake it. - */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-l7200/include/mach/irqs.h b/arch/arm/mach-l7200/include/mach/irqs.h deleted file mode 100644 index 7edffd713c5..00000000000 --- a/arch/arm/mach-l7200/include/mach/irqs.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * arch/arm/mach-l7200/include/mach/irqs.h - * - * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net) - * Steve Hill (sjhill@cotw.com) - * - * Changelog: - * 01-02-2000 RS Create l7200 version - * 03-28-2000 SJH Removed unused interrupt - * 07-28-2000 SJH Added pseudo-keyboard interrupt - */ - -/* - * NOTE: The second timer (Timer 2) is used as the keyboard - * interrupt when the keyboard driver is enabled. - */ - -#define NR_IRQS 32 - -#define IRQ_STWDOG 0 /* Watchdog timer */ -#define IRQ_PROG 1 /* Programmable interrupt */ -#define IRQ_DEBUG_RX 2 /* Comm Rx debug */ -#define IRQ_DEBUG_TX 3 /* Comm Tx debug */ -#define IRQ_GCTC1 4 /* Timer 1 */ -#define IRQ_GCTC2 5 /* Timer 2 / Keyboard */ -#define IRQ_DMA 6 /* DMA controller */ -#define IRQ_CLCD 7 /* Color LCD controller */ -#define IRQ_SM_RX 8 /* Smart card */ -#define IRQ_SM_TX 9 /* Smart cart */ -#define IRQ_SM_RST 10 /* Smart card */ -#define IRQ_SIB 11 /* Serial Interface Bus */ -#define IRQ_MMC 12 /* MultiMediaCard */ -#define IRQ_SSP1 13 /* Synchronous Serial Port 1 */ -#define IRQ_SSP2 14 /* Synchronous Serial Port 1 */ -#define IRQ_SPI 15 /* SPI slave */ -#define IRQ_UART_1 16 /* UART 1 */ -#define IRQ_UART_2 17 /* UART 2 */ -#define IRQ_IRDA 18 /* IRDA */ -#define IRQ_RTC_TICK 19 /* Real Time Clock tick */ -#define IRQ_RTC_ALARM 20 /* Real Time Clock alarm */ -#define IRQ_GPIO 21 /* General Purpose IO */ -#define IRQ_GPIO_DMA 22 /* General Purpose IO, DMA */ -#define IRQ_M2M 23 /* Memory to memory DMA */ -#define IRQ_RESERVED 24 /* RESERVED, don't use */ -#define IRQ_INTF 25 /* External active low interrupt */ -#define IRQ_INT0 26 /* External active low interrupt */ -#define IRQ_INT1 27 /* External active low interrupt */ -#define IRQ_INT2 28 /* External active low interrupt */ -#define IRQ_UCB1200 29 /* Interrupt generated by UCB1200*/ -#define IRQ_BAT_LO 30 /* Low batery or external power */ -#define IRQ_MEDIA_CHG 31 /* Media change interrupt */ - -/* - * This is the offset of the FIQ "IRQ" numbers - */ -#define FIQ_START 64 diff --git a/arch/arm/mach-l7200/include/mach/memory.h b/arch/arm/mach-l7200/include/mach/memory.h deleted file mode 100644 index 9fb40ed2f03..00000000000 --- a/arch/arm/mach-l7200/include/mach/memory.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * arch/arm/mach-l7200/include/mach/memory.h - * - * Copyright (c) 2000 Steve Hill (sjhill@cotw.com) - * Copyright (c) 2000 Rob Scott (rscott@mtrob.fdns.net) - * - * Changelog: - * 03-13-2000 SJH Created - * 04-13-2000 RS Changed bus macros for new addr - * 05-03-2000 SJH Removed bus macros and fixed virt_to_phys macro - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset on the L7200 SDB. - */ -#define PHYS_OFFSET UL(0xf0000000) - -/* - * Cache flushing area - ROM - */ -#define FLUSH_BASE_PHYS 0x40000000 -#define FLUSH_BASE 0xdf000000 - -#endif diff --git a/arch/arm/mach-l7200/include/mach/pmpcon.h b/arch/arm/mach-l7200/include/mach/pmpcon.h deleted file mode 100644 index 3959871e836..00000000000 --- a/arch/arm/mach-l7200/include/mach/pmpcon.h +++ /dev/null @@ -1,46 +0,0 @@ -/****************************************************************************/ -/* - * arch/arm/mach-l7200/include/mach/pmpcon.h - * - * Registers and helper functions for the L7200 Link-Up Systems - * DC/DC converter register. - * - * (C) Copyright 2000, S A McConnell (samcconn@cotw.com) - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -/****************************************************************************/ - -#define PMPCON_OFF 0x00006000 /* Offset from IO_START_2. */ - -/* IO_START_2 and IO_BASE_2 are defined in hardware.h */ - -#define PMPCON_START (IO_START_2 + PMPCON_OFF) /* Physical address of reg. */ -#define PMPCON_BASE (IO_BASE_2 + PMPCON_OFF) /* Virtual address of reg. */ - - -#define PMPCON (*(volatile unsigned int *)(PMPCON_BASE)) - -#define PWM2_50CYCLE 0x800 -#define CONTRAST 0x9 - -#define PWM1H (CONTRAST) -#define PWM1L (CONTRAST << 4) - -#define PMPCON_VALUE (PWM2_50CYCLE | PWM1L | PWM1H) - -/* PMPCON = 0x811; // too light and fuzzy - * PMPCON = 0x844; - * PMPCON = 0x866; // better color poor depth - * PMPCON = 0x888; // Darker but better depth - * PMPCON = 0x899; // Darker even better depth - * PMPCON = 0x8aa; // too dark even better depth - * PMPCON = 0X8cc; // Way too dark - */ - -/* As CONTRAST value increases the greater the depth perception and - * the darker the colors. - */ diff --git a/arch/arm/mach-l7200/include/mach/pmu.h b/arch/arm/mach-l7200/include/mach/pmu.h deleted file mode 100644 index a2da7aedf20..00000000000 --- a/arch/arm/mach-l7200/include/mach/pmu.h +++ /dev/null @@ -1,125 +0,0 @@ -/****************************************************************************/ -/* - * arch/arm/mach-l7200/include/mach/pmu.h - * - * Registers and helper functions for the L7200 Link-Up Systems - * Power Management Unit (PMU). - * - * (C) Copyright 2000, S A McConnell (samcconn@cotw.com) - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -/****************************************************************************/ - -#define PMU_OFF 0x00050000 /* Offset from IO_START to the PMU registers. */ - -/* IO_START and IO_BASE are defined in hardware.h */ - -#define PMU_START (IO_START + PMU_OFF) /* Physical addr. of the PMU reg. */ -#define PMU_BASE (IO_BASE + PMU_OFF) /* Virtual addr. of the PMU reg. */ - - -/* Define the PMU registers for use by device drivers and the kernel. */ - -typedef struct { - unsigned int CURRENT; /* Current configuration register */ - unsigned int NEXT; /* Next configuration register */ - unsigned int reserved; - unsigned int RUN; /* Run configuration register */ - unsigned int COMM; /* Configuration command register */ - unsigned int SDRAM; /* SDRAM configuration bypass register */ -} pmu_interface; - -#define PMU ((volatile pmu_interface *)(PMU_BASE)) - - -/* Macro's for reading the common register fields. */ - -#define GET_TRANSOP(reg) ((reg >> 25) & 0x03) /* Bits 26-25 */ -#define GET_OSCEN(reg) ((reg >> 16) & 0x01) -#define GET_OSCMUX(reg) ((reg >> 15) & 0x01) -#define GET_PLLMUL(reg) ((reg >> 9) & 0x3f) /* Bits 14-9 */ -#define GET_PLLEN(reg) ((reg >> 8) & 0x01) -#define GET_PLLMUX(reg) ((reg >> 7) & 0x01) -#define GET_BCLK_DIV(reg) ((reg >> 3) & 0x03) /* Bits 4-3 */ -#define GET_SDRB_SEL(reg) ((reg >> 2) & 0x01) -#define GET_SDRF_SEL(reg) ((reg >> 1) & 0x01) -#define GET_FASTBUS(reg) (reg & 0x1) - -/* CFG_NEXT register */ - -#define CFG_NEXT_CLOCKRECOVERY ((PMU->NEXT >> 18) & 0x7f) /* Bits 24-18 */ -#define CFG_NEXT_INTRET ((PMU->NEXT >> 17) & 0x01) -#define CFG_NEXT_SDR_STOP ((PMU->NEXT >> 6) & 0x01) -#define CFG_NEXT_SYSCLKEN ((PMU->NEXT >> 5) & 0x01) - -/* Useful field values that can be used to construct the - * CFG_NEXT and CFG_RUN registers. - */ - -#define TRANSOP_NOP 0<<25 /* NOCHANGE_NOSTALL */ -#define NOCHANGE_STALL 1<<25 -#define CHANGE_NOSTALL 2<<25 -#define CHANGE_STALL 3<<25 - -#define INTRET 1<<17 -#define OSCEN 1<<16 -#define OSCMUX |