diff options
47 files changed, 299 insertions, 331 deletions
diff --git a/arch/microblaze/Makefile b/arch/microblaze/Makefile index d26fb905ee0..0a603d3ecf2 100644 --- a/arch/microblaze/Makefile +++ b/arch/microblaze/Makefile @@ -69,16 +69,13 @@ export MMU DTB all: linux.bin -# With make 3.82 we cannot mix normal and wildcard targets -BOOT_TARGETS1 = linux.bin linux.bin.gz -BOOT_TARGETS2 = simpleImage.% - archclean: $(Q)$(MAKE) $(clean)=$(boot) -$(BOOT_TARGETS1): vmlinux +linux.bin linux.bin.gz: vmlinux $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ -$(BOOT_TARGETS2): vmlinux + +simpleImage.%: vmlinux $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ define archhelp diff --git a/arch/microblaze/boot/.gitignore b/arch/microblaze/boot/.gitignore new file mode 100644 index 00000000000..bf045918602 --- /dev/null +++ b/arch/microblaze/boot/.gitignore @@ -0,0 +1,3 @@ +*.dtb +linux.bin* +simpleImage.* diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h index 4fbfdc1ac7f..8cb8a8566ed 100644 --- a/arch/microblaze/include/asm/io.h +++ b/arch/microblaze/include/asm/io.h @@ -150,7 +150,7 @@ static inline void writel(unsigned int v, volatile void __iomem *addr) #define page_to_bus(page) (page_to_phys(page)) #define bus_to_virt(addr) (phys_to_virt(addr)) -extern void iounmap(void *addr); +extern void iounmap(void __iomem *addr); /*extern void *__ioremap(phys_addr_t address, unsigned long size, unsigned long flags);*/ extern void __iomem *ioremap(phys_addr_t address, unsigned long size); diff --git a/arch/microblaze/kernel/.gitignore b/arch/microblaze/kernel/.gitignore new file mode 100644 index 00000000000..c5f676c3c22 --- /dev/null +++ b/arch/microblaze/kernel/.gitignore @@ -0,0 +1 @@ +vmlinux.lds diff --git a/arch/microblaze/kernel/cpu/cache.c b/arch/microblaze/kernel/cpu/cache.c index 4b7d8a3f4ae..4254514b4c8 100644 --- a/arch/microblaze/kernel/cpu/cache.c +++ b/arch/microblaze/kernel/cpu/cache.c @@ -17,82 +17,70 @@ static inline void __enable_icache_msr(void) { - __asm__ __volatile__ (" msrset r0, %0; \ - nop; " \ + __asm__ __volatile__ (" msrset r0, %0;" \ + "nop;" \ : : "i" (MSR_ICE) : "memory"); } static inline void __disable_icache_msr(void) { - __asm__ __volatile__ (" msrclr r0, %0; \ - nop; " \ + __asm__ __volatile__ (" msrclr r0, %0;" \ + "nop;" \ : : "i" (MSR_ICE) : "memory"); } static inline void __enable_dcache_msr(void) { - __asm__ __volatile__ (" msrset r0, %0; \ - nop; " \ - : \ - : "i" (MSR_DCE) \ - : "memory"); + __asm__ __volatile__ (" msrset r0, %0;" \ + "nop;" \ + : : "i" (MSR_DCE) : "memory"); } static inline void __disable_dcache_msr(void) { - __asm__ __volatile__ (" msrclr r0, %0; \ - nop; " \ - : \ - : "i" (MSR_DCE) \ - : "memory"); + __asm__ __volatile__ (" msrclr r0, %0;" \ + "nop; " \ + : : "i" (MSR_DCE) : "memory"); } static inline void __enable_icache_nomsr(void) { - __asm__ __volatile__ (" mfs r12, rmsr; \ - nop; \ - ori r12, r12, %0; \ - mts rmsr, r12; \ - nop; " \ - : \ - : "i" (MSR_ICE) \ - : "memory", "r12"); + __asm__ __volatile__ (" mfs r12, rmsr;" \ + "nop;" \ + "ori r12, r12, %0;" \ + "mts rmsr, r12;" \ + "nop;" \ + : : "i" (MSR_ICE) : "memory", "r12"); } static inline void __disable_icache_nomsr(void) { - __asm__ __volatile__ (" mfs r12, rmsr; \ - nop; \ - andi r12, r12, ~%0; \ - mts rmsr, r12; \ - nop; " \ - : \ - : "i" (MSR_ICE) \ - : "memory", "r12"); + __asm__ __volatile__ (" mfs r12, rmsr;" \ + "nop;" \ + "andi r12, r12, ~%0;" \ + "mts rmsr, r12;" \ + "nop;" \ + : : "i" (MSR_ICE) : "memory", "r12"); } static inline void __enable_dcache_nomsr(void) { - __asm__ __volatile__ (" mfs r12, rmsr; \ - nop; \ - ori r12, r12, %0; \ - mts rmsr, r12; \ - nop; " \ - : \ - : "i" (MSR_DCE) \ - : "memory", "r12"); + __asm__ __volatile__ (" mfs r12, rmsr;" \ + "nop;" \ + "ori r12, r12, %0;" \ + "mts rmsr, r12;" \ + "nop;" \ + : : "i" (MSR_DCE) : "memory", "r12"); } static inline void __disable_dcache_nomsr(void) { - __asm__ __volatile__ (" mfs r12, rmsr; \ - nop; \ - andi r12, r12, ~%0; \ - mts rmsr, r12; \ - nop; " \ - : \ - : "i" (MSR_DCE) \ - : "memory", "r12"); + __asm__ __volatile__ (" mfs r12, rmsr;" \ + "nop;" \ + "andi r12, r12, ~%0;" \ + "mts rmsr, r12;" \ + "nop;" \ + : : "i" (MSR_DCE) : "memory", "r12"); } @@ -106,7 +94,7 @@ do { \ int align = ~(cache_line_length - 1); \ end = min(start + cache_size, end); \ start &= align; \ -} while (0); +} while (0) /* * Helper macro to loop over the specified cache_size/line_length and @@ -118,12 +106,12 @@ do { \ int step = -line_length; \ WARN_ON(step >= 0); \ \ - __asm__ __volatile__ (" 1: " #op " %0, r0; \ - bgtid %0, 1b; \ - addk %0, %0, %1; \ - " : : "r" (len), "r" (step) \ + __asm__ __volatile__ (" 1: " #op " %0, r0;" \ + "bgtid %0, 1b;" \ + "addk %0, %0, %1;" \ + : : "r" (len), "r" (step) \ : "memory"); \ -} while (0); +} while (0) /* Used for wdc.flush/clear which can use rB for offset which is not possible * to use for simple wdc or wic. @@ -142,12 +130,12 @@ do { \ count = end - start; \ WARN_ON(count < 0); \ \ - __asm__ __volatile__ (" 1: " #op " %0, %1; \ - bgtid %1, 1b; \ - addk %1, %1, %2; \ - " : : "r" (start), "r" (count), \ + __asm__ __volatile__ (" 1: " #op " %0, %1;" \ + "bgtid %1, 1b;" \ + "addk %1, %1, %2;" \ + : : "r" (start), "r" (count), \ "r" (step) : "memory"); \ -} while (0); +} while (0) /* It is used only first parameter for OP - for wic, wdc */ #define CACHE_RANGE_LOOP_1(start, end, line_length, op) \ @@ -157,13 +145,13 @@ do { \ end = ((end & align) == end) ? end - line_length : end & align; \ WARN_ON(end - start < 0); \ \ - __asm__ __volatile__ (" 1: " #op " %1, r0; \ - cmpu %0, %1, %2; \ - bgtid %0, 1b; \ - addk %1, %1, %3; \ - " : : "r" (temp), "r" (start), "r" (end),\ + __asm__ __volatile__ (" 1: " #op " %1, r0;" \ + "cmpu %0, %1, %2;" \ + "bgtid %0, 1b;" \ + "addk %1, %1, %3;" \ + : : "r" (temp), "r" (start), "r" (end), \ "r" (line_length) : "memory"); \ -} while (0); +} while (0) #define ASM_LOOP @@ -352,7 +340,7 @@ static void __invalidate_dcache_all_noirq_wt(void) #endif pr_debug("%s\n", __func__); #ifdef ASM_LOOP - CACHE_ALL_LOOP(cpuinfo.dcache_size, cpuinfo.dcache_line_length, wdc) + CACHE_ALL_LOOP(cpuinfo.dcache_size, cpuinfo.dcache_line_length, wdc); #else for (i = 0; i < cpuinfo.dcache_size; i += cpuinfo.dcache_line_length) @@ -361,7 +349,8 @@ static void __invalidate_dcache_all_noirq_wt(void) #endif } -/* FIXME It is blindly invalidation as is expected +/* + * FIXME It is blindly invalidation as is expected * but can't be called on noMMU in microblaze_cache_init below * * MS: noMMU kernel won't boot if simple wdc is used @@ -375,7 +364,7 @@ static void __invalidate_dcache_all_wb(void) pr_debug("%s\n", __func__); #ifdef ASM_LOOP CACHE_ALL_LOOP(cpuinfo.dcache_size, cpuinfo.dcache_line_length, - wdc) + wdc); #else for (i = 0; i < cpuinfo.dcache_size; i += cpuinfo.dcache_line_length) @@ -616,49 +605,48 @@ static const struct scache wt_nomsr_noirq = { #define CPUVER_7_20_A 0x0c #define CPUVER_7_20_D 0x0f -#define INFO(s) printk(KERN_INFO "cache: " s "\n"); - void microblaze_cache_init(void) { if (cpuinfo.use_instr & PVR2_USE_MSR_INSTR) { if (cpuinfo.dcache_wb) { - INFO("wb_msr"); + pr_info("wb_msr\n"); mbc = (struct scache *)&wb_msr; if (cpuinfo.ver_code <= CPUVER_7_20_D) { /* MS: problem with signal handling - hw bug */ - INFO("WB won't work properly"); + pr_info("WB won't work properly\n"); } } else { if (cpuinfo.ver_code >= CPUVER_7_20_A) { - INFO("wt_msr_noirq"); + pr_info("wt_msr_noirq\n"); mbc = (struct scache *)&wt_msr_noirq; } else { - INFO("wt_msr"); + pr_info("wt_msr\n"); mbc = (struct scache *)&wt_msr; } } } else { if (cpuinfo.dcache_wb) { - INFO("wb_nomsr"); + pr_info("wb_nomsr\n"); mbc = (struct scache *)&wb_nomsr; if (cpuinfo.ver_code <= CPUVER_7_20_D) { /* MS: problem with signal handling - hw bug */ - INFO("WB won't work properly"); + pr_info("WB won't work properly\n"); } } else { if (cpuinfo.ver_code >= CPUVER_7_20_A) { - INFO("wt_nomsr_noirq"); + pr_info("wt_nomsr_noirq\n"); mbc = (struct scache *)&wt_nomsr_noirq; } else { - INFO("wt_nomsr"); + pr_info("wt_nomsr\n"); mbc = (struct scache *)&wt_nomsr; } } } -/* FIXME Invalidation is done in U-BOOT - * WT cache: Data is already written to main memory - * WB cache: Discard data on noMMU which caused that kernel doesn't boot - */ + /* + * FIXME Invalidation is done in U-BOOT + * WT cache: Data is already written to main memory + * WB cache: Discard data on noMMU which caused that kernel doesn't boot + */ /* invalidate_dcache(); */ enable_dcache(); diff --git a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c index 916aaedf194..ee468941541 100644 --- a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c +++ b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c @@ -27,7 +27,7 @@ early_printk("ERROR: Microblaze " x "-different for PVR and DTS\n"); #else #define err_printk(x) \ - printk(KERN_INFO "ERROR: Microblaze " x "-different for PVR and DTS\n"); + pr_info("ERROR: Microblaze " x "-different for PVR and DTS\n"); #endif void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu) @@ -38,12 +38,11 @@ void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu) CI(ver_code, VERSION); if (!ci->ver_code) { - printk(KERN_ERR "ERROR: MB has broken PVR regs " - "-> use DTS setting\n"); + pr_err("ERROR: MB has broken PVR regs -> use DTS setting\n"); return; } - temp = PVR_USE_BARREL(pvr) | PVR_USE_MSR_INSTR(pvr) |\ + temp = PVR_USE_BARREL(pvr) | PVR_USE_MSR_INSTR(pvr) | PVR_USE_PCMP_INSTR(pvr) | PVR_USE_DIV(pvr); if (ci->use_instr != temp) err_printk("BARREL, MSR, PCMP or DIV"); @@ -59,13 +58,13 @@ void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu) err_printk("HW_FPU"); ci->use_fpu = temp; - ci->use_exc = PVR_OPCODE_0x0_ILLEGAL(pvr) |\ - PVR_UNALIGNED_EXCEPTION(pvr) |\ - PVR_ILL_OPCODE_EXCEPTION(pvr) |\ - PVR_IOPB_BUS_EXCEPTION(pvr) |\ - PVR_DOPB_BUS_EXCEPTION(pvr) |\ - PVR_DIV_ZERO_EXCEPTION(pvr) |\ - PVR_FPU_EXCEPTION(pvr) |\ + ci->use_exc = PVR_OPCODE_0x0_ILLEGAL(pvr) | + PVR_UNALIGNED_EXCEPTION(pvr) | + PVR_ILL_OPCODE_EXCEPTION(pvr) | + PVR_IOPB_BUS_EXCEPTION(pvr) | + PVR_DOPB_BUS_EXCEPTION(pvr) | + PVR_DIV_ZERO_EXCEPTION(pvr) | + PVR_FPU_EXCEPTION(pvr) | PVR_FSL_EXCEPTION(pvr); CI(pvr_user1, USER1); diff --git a/arch/microblaze/kernel/cpu/cpuinfo.c b/arch/microblaze/kernel/cpu/cpuinfo.c index eab6abf5652..0b2299bcb94 100644 --- a/arch/microblaze/kernel/cpu/cpuinfo.c +++ b/arch/microblaze/kernel/cpu/cpuinfo.c @@ -68,31 +68,30 @@ void __init setup_cpuinfo(void) cpu = (struct device_node *) of_find_node_by_type(NULL, "cpu"); if (!cpu) - printk(KERN_ERR "You don't have cpu!!!\n"); + pr_err("You don't have cpu!!!\n"); - printk(KERN_INFO "%s: initialising\n", __func__); + pr_info("%s: initialising\n", __func__); switch (cpu_has_pvr()) { case 0: - printk(KERN_WARNING - "%s: No PVR support. Using static CPU info from FDT\n", + pr_warn("%s: No PVR support. Using static CPU info from FDT\n", __func__); set_cpuinfo_static(&cpuinfo, cpu); break; /* FIXME I found weird behavior with MB 7.00.a/b 7.10.a * please do not use FULL PVR with MMU */ case 1: - printk(KERN_INFO "%s: Using full CPU PVR support\n", + pr_info("%s: Using full CPU PVR support\n", __func__); set_cpuinfo_static(&cpuinfo, cpu); set_cpuinfo_pvr_full(&cpuinfo, cpu); break; default: - printk(KERN_WARNING "%s: Unsupported PVR setting\n", __func__); + pr_warn("%s: Unsupported PVR setting\n", __func__); set_cpuinfo_static(&cpuinfo, cpu); } if (cpuinfo.mmu_privins) - printk(KERN_WARNING "%s: Stream instructions enabled" + pr_warn("%s: Stream instructions enabled" " - USERSPACE CAN LOCK THIS KERNEL!\n", __func__); } diff --git a/arch/microblaze/kernel/cpu/pvr.c b/arch/microblaze/kernel/cpu/pvr.c index 3a749d5e71f..8d0dc6db48c 100644 --- a/arch/microblaze/kernel/cpu/pvr.c +++ b/arch/microblaze/kernel/cpu/pvr.c @@ -27,7 +27,7 @@ tmp = 0x0; /* Prevent warning about unused */ \ __asm__ __volatile__ ( \ "mfs %0, rpvr" #pvrid ";" \ - : "=r" (tmp) : : "memory"); \ + : "=r" (tmp) : : "memory"); \ val = tmp; \ } diff --git a/arch/microblaze/kernel/dma.c b/arch/microblaze/kernel/dma.c index a2bfa2ca573..da68d00fd08 100644 --- a/arch/microblaze/kernel/dma.c +++ b/arch/microblaze/kernel/dma.c @@ -11,7 +11,7 @@ #include <linux/gfp.h> #include <linux/dma-debug.h> #include <linux/export.h> -#include <asm/bug.h> +#include <linux/bug.h> /* * Generic direct DMA implementation @@ -197,8 +197,8 @@ EXPORT_SYMBOL(dma_direct_ops); static int __init dma_init(void) { - dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES); + dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES); - return 0; + return 0; } fs_initcall(dma_init); diff --git a/arch/microblaze/kernel/early_printk.c b/arch/microblaze/kernel/early_printk.c index aba1f9a97d5..60dcacc6803 100644 --- a/arch/microblaze/kernel/early_printk.c +++ b/arch/microblaze/kernel/early_printk.c @@ -140,20 +140,20 @@ int __init setup_early_printk(char *opt) switch (version) { #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE case UARTLITE: - printk(KERN_INFO "Early console on uartlite " - "at 0x%08x\n", base_addr); + pr_info("Early console on uartlite at 0x%08x\n", + base_addr); early_console = &early_serial_uartlite_console; break; #endif #ifdef CONFIG_SERIAL_8250_CONSOLE case UART16550: - printk(KERN_INFO "Early console on uart16650 " - "at 0x%08x\n", base_addr); + pr_info("Early console on uart16650 at 0x%08x\n", + base_addr); early_console = &early_serial_uart16550_console; break; #endif default: - printk(KERN_INFO "Unsupported early console %d\n", + pr_info("Unsupported early console %d\n", version); return 1; } @@ -171,10 +171,9 @@ void __init remap_early_printk(void) { if (!early_console_initialized || !early_console) return; - printk(KERN_INFO "early_printk_console remapping from 0x%x to ", - base_addr); + pr_info("early_printk_console remapping from 0x%x to ", base_addr); base_addr = (u32) ioremap(base_addr, PAGE_SIZE); - printk(KERN_CONT "0x%x\n", base_addr); + pr_cont("0x%x\n", base_addr); #ifdef CONFIG_MMU /* @@ -197,7 +196,7 @@ void __init disable_early_printk(void) { if (!early_console_initialized || !early_console) return; - printk(KERN_WARNING "disabling early console\n"); + pr_warn("disabling early console\n"); unregister_console(early_console); early_console_initialized = 0; } diff --git a/arch/microblaze/kernel/exceptions.c b/arch/microblaze/kernel/exceptions.c index 6348dc82f42..42dd12a62ff 100644 --- a/arch/microblaze/kernel/exceptions.c +++ b/arch/microblaze/kernel/exceptions.c @@ -13,11 +13,11 @@ * This file handles the architecture-dependent parts of hardware exceptions */ +#include <linux/export.h> #include <linux/kernel.h> #include <linux/signal.h> #include <linux/sched.h> #include <linux/kallsyms.h> -#include <linux/module.h> #include <asm/exceptions.h> #include <asm/entry.h> /* For KM CPU var */ @@ -40,7 +40,7 @@ void die(const char *str, struct pt_regs *fp, long err) { console_verbose(); spin_lock_irq(&die_lock); - printk(KERN_WARNING "Oops: %s, sig: %ld\n", str, err); + pr_warn("Oops: %s, sig: %ld\n", str, err); show_regs(fp); spin_unlock_irq(&die_lock); /* do_exit() should take care of panic'ing from an interrupt @@ -61,9 +61,9 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr) { siginfo_t info; - if (kernel_mode(regs)) { + if (kernel_mode(regs)) die("Exception in kernel mode", regs, signr); - } + info.si_signo = signr; info.si_errno = 0; info.si_code = code; @@ -79,8 +79,7 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, #endif #if 0 - printk(KERN_WARNING "Exception %02x in %s mode, FSR=%08x PC=%08x " \ - "ESR=%08x\n", + pr_warn("Exception %02x in %s mode, FSR=%08x PC=%08x ESR=%08x\n", type, user_mode(regs) ? "user" : "kernel", fsr, (unsigned int) regs->pc, (unsigned int) regs->esr); #endif @@ -92,8 +91,7 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, _exception(SIGILL, regs, ILL_ILLOPC, addr); return; } - printk(KERN_WARNING "Illegal opcode exception " \ - "in kernel mode.\n"); + pr_warn("Illegal opcode exception in kernel mode.\n"); die("opcode exception", regs, SIGBUS); break; case MICROBLAZE_IBUS_EXCEPTION: @@ -102,8 +100,7 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, _exception(SIGBUS, regs, BUS_ADRERR, addr); return; } - printk(KERN_WARNING "Instruction bus error exception " \ - "in kernel mode.\n"); + pr_warn("Instruction bus error exception in kernel mode.\n"); die("bus exception", regs, SIGBUS); break; case MICROBLAZE_DBUS_EXCEPTION: @@ -112,8 +109,7 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, _exception(SIGBUS, regs, BUS_ADRERR, addr); return; } - printk(KERN_WARNING "Data bus error exception " \ - "in kernel mode.\n"); + pr_warn("Data bus error exception in kernel mode.\n"); die("bus exception", regs, SIGBUS); break; case MICROBLAZE_DIV_ZERO_EXCEPTION: @@ -122,8 +118,7 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, _exception(SIGFPE, regs, FPE_INTDIV, addr); return; } - printk(KERN_WARNING "Divide by zero exception " \ - "in kernel mode.\n"); + pr_warn("Divide by zero exception in kernel mode.\n"); die("Divide by zero exception", regs, SIGBUS); break; case MICROBLAZE_FPU_EXCEPTION: @@ -151,8 +146,8 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, #endif default: /* FIXME what to do in unexpected exception */ - printk(KERN_WARNING "Unexpected exception %02x " - "PC=%08x in %s mode\n", type, (unsigned int) addr, + pr_warn("Unexpected exception %02x PC=%08x in %s mode\n", + type, (unsigned int) addr, kernel_mode(regs) ? "kernel" : "user"); } return; diff --git a/arch/microblaze/kernel/ftrace.c b/arch/microblaze/kernel/ftrace.c index 357d56abe24..e8a5e9cf4ed 100644 --- a/arch/microblaze/kernel/ftrace.c +++ b/arch/microblaze/kernel/ftrace.c @@ -35,18 +35,18 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr) * happen. This tool is too much intrusive to * ignore such a protection. */ - asm volatile(" 1: lwi %0, %2, 0; \ - 2: swi %3, %2, 0; \ - addik %1, r0, 0; \ - 3: \ - .section .fixup, \"ax\"; \ - 4: brid 3b; \ - addik %1, r0, 1; \ - .previous; \ - .section __ex_table,\"a\"; \ - .word 1b,4b; \ - .word 2b,4b; \ - .previous;" \ + asm volatile(" 1: lwi %0, %2, 0;" \ + "2: swi %3, %2, 0;" \ + " addik %1, r0, 0;" \ + "3:" \ + " .section .fixup, \"ax\";" \ + "4: brid 3b;" \ + " addik %1, r0, 1;" \ + " .previous;" \ + " .section __ex_table,\"a\";" \ + " .word 1b,4b;" \ + " .word 2b,4b;" \ + " .previous;" \ : "=&r" (old), "=r" (faulted) : "r" (parent), "r" (return_hooker) ); @@ -81,16 +81,16 @@ static int ftrace_modify_code(unsigned long addr, unsigned int value) { int faulted = 0; - __asm__ __volatile__(" 1: swi %2, %1, 0; \ - addik %0, r0, 0; \ - 2: \ - .section .fixup, \"ax\"; \ - 3: brid 2b; \ - addik %0, r0, 1; \ - .previous; \ - .section __ex_table,\"a\"; \ - .word 1b,3b; \ - .previous;" \ + __asm__ __volatile__(" 1: swi %2, %1, 0;" \ + " addik %0, r0, 0;" \ + "2:" \ + " .section .fixup, \"ax\";" \ + "3: brid 2b;" \ + " addik %0, r0, 1;" \ + " .previous;" \ + " .section __ex_table,\"a\";" \ + " .word 1b,3b;" \ + " .previous;" \ : "=r" (faulted) : "r" (addr), "r" (value) ); diff --git a/arch/microblaze/kernel/heartbeat.c b/arch/microblaze/kernel/heartbeat.c index 154756f3c69..1879a052777 100644 --- a/arch/microblaze/kernel/heartbeat.c +++ b/arch/microblaze/kernel/heartbeat.c @@ -61,7 +61,7 @@ void setup_heartbeat(void) if (gpio) { base_addr = be32_to_cpup(of_get_property(gpio, "reg", NULL)); base_addr = (unsigned long) ioremap(base_addr, PAGE_SIZE); - printk(KERN_NOTICE "Heartbeat GPIO at 0x%x\n", base_addr); + pr_notice("Heartbeat GPIO at 0x%x\n", base_addr); /* GPIO is configured as output */ prop = (int *) of_get_property(gpio, "xlnx,is-bidir", NULL); diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c index 7a1a8d4354f..8778adf72bd 100644 --- a/arch/microblaze/kernel/intc.c +++ b/arch/microblaze/kernel/intc.c @@ -147,12 +147,12 @@ void __init init_IRQ(void) intr_mask = be32_to_cpup(of_get_property(intc, "xlnx,kind-of-intr", NULL)); if (intr_mask > (u32)((1ULL << nr_irq) - 1)) - printk(KERN_INFO " ERROR: Mismatch in kind-of-intr param\n"); + pr_info(" ERROR: Mismatch in kind-of-intr param\n"); #ifdef CONFIG_SELFMOD_INTC selfmod_function((int *) arr_func, intc_baseaddr); #endif - printk(KERN_INFO "%s #0 at 0x%08x, num_irq=%d, edge=0x%x\n", + pr_info("%s #0 at 0x%08x, num_irq=%d, edge=0x%x\n", intc->name, intc_baseaddr, nr_irq, intr_mask); /* diff --git a/arch/microblaze/kernel/kgdb.c b/arch/microblaze/kernel/kgdb.c index 09a5e828613..8adc9244310 100644 --- a/arch/microblaze/kernel/kgdb.c +++ b/arch/microblaze/kernel/kgdb.c @@ -141,7 +141,7 @@ void kgdb_arch_exit(void) /* * Global data */ -struct kgdb_arch arch_kgdb_ops = { +const struct kgdb_arch arch_kgdb_ops = { #ifdef __MICROBLAZEEL__ .gdb_bpt_instr = {0x18, 0x00, 0x0c, 0xba}, /* brki r16, 0x18 */ #else diff --git a/arch/microblaze/ker |