diff options
| -rw-r--r-- | arch/x86/pci/i386.c | 2 | ||||
| -rw-r--r-- | drivers/pci/probe.c | 4 | ||||
| -rw-r--r-- | include/linux/pci_regs.h | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c index 055187bc255..42ba0e2da1a 100644 --- a/arch/x86/pci/i386.c +++ b/arch/x86/pci/i386.c @@ -37,7 +37,7 @@ static int skip_isa_ioresource_align(struct pci_dev *dev) { if ((pci_probe & PCI_CAN_SKIP_ISA_ALIGN) && - (dev->bus->bridge_ctl & PCI_BRIDGE_CTL_NO_ISA)) + !(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA)) return 1; return 0; } diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 3112024bdc2..5db6b6690b5 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -543,7 +543,7 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass goto out; child->primary = buses & 0xFF; child->subordinate = (buses >> 16) & 0xFF; - child->bridge_ctl = bctl ^ PCI_BRIDGE_CTL_NO_ISA; + child->bridge_ctl = bctl; cmax = pci_scan_child_bus(child); if (cmax > max) @@ -596,7 +596,7 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses); if (!is_cardbus) { - child->bridge_ctl = bctl ^ PCI_BRIDGE_CTL_NO_ISA; + child->bridge_ctl = bctl; /* * Adjust subordinate busnr in parent buses. * We do this before scanning for children because diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index 4a24ee368a1..c1914a8b94a 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -147,7 +147,7 @@ #define PCI_BRIDGE_CONTROL 0x3e #define PCI_BRIDGE_CTL_PARITY 0x01 /* Enable parity detection on secondary interface */ #define PCI_BRIDGE_CTL_SERR 0x02 /* The same for SERR forwarding */ -#define PCI_BRIDGE_CTL_NO_ISA 0x04 /* Disable bridging of ISA ports */ +#define PCI_BRIDGE_CTL_ISA 0x04 /* Enable ISA mode */ #define PCI_BRIDGE_CTL_VGA 0x08 /* Forward VGA addresses */ #define PCI_BRIDGE_CTL_MASTER_ABORT 0x20 /* Report master aborts */ #define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */ |