aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--arch/arm/mach-mx2/clock_imx21.c5
-rw-r--r--arch/arm/mach-mx2/clock_imx27.c5
-rw-r--r--arch/arm/mach-mx2/cpu_imx27.c2
-rw-r--r--arch/arm/mach-mx2/eukrea_cpuimx27.c12
-rw-r--r--arch/arm/mach-mx2/mx21ads.c10
-rw-r--r--arch/arm/mach-mx2/mx27ads.c6
-rw-r--r--arch/arm/mach-mx2/mx27lite.c4
-rw-r--r--arch/arm/mach-mx2/mx27pdk.c4
-rw-r--r--arch/arm/mach-mx2/mxt_td60.c4
-rw-r--r--arch/arm/mach-mx2/pca100.c4
-rw-r--r--arch/arm/mach-mx2/pcm038.c8
-rw-r--r--arch/arm/mach-mx2/pcm970-baseboard.c4
12 files changed, 35 insertions, 33 deletions
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c
index 1922e531ba4..6ab3c729a45 100644
--- a/arch/arm/mach-mx2/clock_imx21.c
+++ b/arch/arm/mach-mx2/clock_imx21.c
@@ -28,7 +28,7 @@
#include <asm/clkdev.h>
#include <asm/div64.h>
-#define IO_ADDR_CCM(off) (IO_ADDRESS(CCM_BASE_ADDR) + (off))
+#define IO_ADDR_CCM(off) (IO_ADDRESS(MX21_CCM_BASE_ADDR) + (off))
/* Register offsets */
#define CCM_CSCR IO_ADDR_CCM(0x0)
@@ -1235,6 +1235,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
clk_enable(&uart_clk[0]);
#endif
- mxc_timer_init(&gpt_clk[0], IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1);
+ mxc_timer_init(&gpt_clk[0], IO_ADDRESS(MX21_GPT1_BASE_ADDR),
+ MX21_INT_GPT1);
return 0;
}
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c
index a5332086098..6db98566a72 100644
--- a/arch/arm/mach-mx2/clock_imx27.c
+++ b/arch/arm/mach-mx2/clock_imx27.c
@@ -29,7 +29,7 @@
#include <mach/common.h>
#include <mach/hardware.h>
-#define IO_ADDR_CCM(off) (IO_ADDRESS(CCM_BASE_ADDR) + (off))
+#define IO_ADDR_CCM(off) (IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off))
/* Register offsets */
#define CCM_CSCR IO_ADDR_CCM(0x0)
@@ -757,7 +757,8 @@ int __init mx27_clocks_init(unsigned long fref)
clk_enable(&uart1_clk);
#endif
- mxc_timer_init(&gpt1_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1);
+ mxc_timer_init(&gpt1_clk, IO_ADDRESS(MX27_GPT1_BASE_ADDR),
+ MX27_INT_GPT1);
return 0;
}
diff --git a/arch/arm/mach-mx2/cpu_imx27.c b/arch/arm/mach-mx2/cpu_imx27.c
index d9e3bf9644c..8c50c5e7c03 100644
--- a/arch/arm/mach-mx2/cpu_imx27.c
+++ b/arch/arm/mach-mx2/cpu_imx27.c
@@ -39,7 +39,7 @@ static void query_silicon_parameter(void)
* the silicon revision very early we read it here to
* avoid any further hooks
*/
- val = __raw_readl(IO_ADDRESS(SYSCTRL_BASE_ADDR) + SYS_CHIP_ID);
+ val = __raw_readl(IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR) + SYS_CHIP_ID);
cpu_silicon_rev = (int)(val >> 28);
cpu_partnumber = (int)((val >> 12) & 0xFFFF);
diff --git a/arch/arm/mach-mx2/eukrea_cpuimx27.c b/arch/arm/mach-mx2/eukrea_cpuimx27.c
index 7b187606682..8e4f3d08e32 100644
--- a/arch/arm/mach-mx2/eukrea_cpuimx27.c
+++ b/arch/arm/mach-mx2/eukrea_cpuimx27.c
@@ -142,28 +142,28 @@ static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
static struct plat_serial8250_port serial_platform_data[] = {
{
- .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x200000),
+ .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
.irq = IRQ_GPIOB(23),
.uartclk = 14745600,
.regshift = 1,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
}, {
- .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x400000),
+ .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
.irq = IRQ_GPIOB(22),
.uartclk = 14745600,
.regshift = 1,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
}, {
- .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x800000),
+ .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
.irq = IRQ_GPIOB(27),
.uartclk = 14745600,
.regshift = 1,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
}, {
- .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x1000000),
+ .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
.irq = IRQ_GPIOB(30),
.uartclk = 14745600,
.regshift = 1,
@@ -224,8 +224,8 @@ static struct sys_timer eukrea_cpuimx27_timer = {
};
MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
- .phys_io = AIPI_BASE_ADDR,
- .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX27_AIPI_BASE_ADDR,
+ .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx27_map_io,
.init_irq = mx27_init_irq,
diff --git a/arch/arm/mach-mx2/mx21ads.c b/arch/arm/mach-mx2/mx21ads.c
index cf5f77cbc2f..eb4a6e85559 100644
--- a/arch/arm/mach-mx2/mx21ads.c
+++ b/arch/arm/mach-mx2/mx21ads.c
@@ -118,8 +118,8 @@ static struct physmap_flash_data mx21ads_flash_data = {
};
static struct resource mx21ads_flash_resource = {
- .start = CS0_BASE_ADDR,
- .end = CS0_BASE_ADDR + 0x02000000 - 1,
+ .start = MX21_CS0_BASE_ADDR,
+ .end = MX21_CS0_BASE_ADDR + 0x02000000 - 1,
.flags = IORESOURCE_MEM,
};
@@ -242,7 +242,7 @@ static struct map_desc mx21ads_io_desc[] __initdata = {
*/
{
.virtual = MX21ADS_MMIO_BASE_ADDR,
- .pfn = __phys_to_pfn(CS1_BASE_ADDR),
+ .pfn = __phys_to_pfn(MX21_CS1_BASE_ADDR),
.length = MX21ADS_MMIO_SIZE,
.type = MT_DEVICE,
},
@@ -284,8 +284,8 @@ static struct sys_timer mx21ads_timer = {
MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
/* maintainer: Freescale Semiconductor, Inc. */
- .phys_io = AIPI_BASE_ADDR,
- .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX21_AIPI_BASE_ADDR,
+ .io_pg_offst = ((MX21_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx21ads_map_io,
.init_irq = mx21_init_irq,
diff --git a/arch/arm/mach-mx2/mx27ads.c b/arch/arm/mach-mx2/mx27ads.c
index 83e412b713e..385fc1c9ad3 100644
--- a/arch/arm/mach-mx2/mx27ads.c
+++ b/arch/arm/mach-mx2/mx27ads.c
@@ -320,7 +320,7 @@ static struct sys_timer mx27ads_timer = {
static struct map_desc mx27ads_io_desc[] __initdata = {
{
.virtual = PBC_BASE_ADDRESS,
- .pfn = __phys_to_pfn(CS4_BASE_ADDR),
+ .pfn = __phys_to_pfn(MX27_CS4_BASE_ADDR),
.length = SZ_1M,
.type = MT_DEVICE,
},
@@ -334,8 +334,8 @@ static void __init mx27ads_map_io(void)
MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
/* maintainer: Freescale Semiconductor, Inc. */
- .phys_io = AIPI_BASE_ADDR,
- .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX27_AIPI_BASE_ADDR,
+ .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx27ads_map_io,
.init_irq = mx27_init_irq,
diff --git a/arch/arm/mach-mx2/mx27lite.c b/arch/arm/mach-mx2/mx27lite.c
index 82ea227ea0c..ca6ab1265f3 100644
--- a/arch/arm/mach-mx2/mx27lite.c
+++ b/arch/arm/mach-mx2/mx27lite.c
@@ -85,8 +85,8 @@ static struct sys_timer mx27lite_timer = {
};
MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
- .phys_io = AIPI_BASE_ADDR,
- .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX27_AIPI_BASE_ADDR,
+ .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx27_map_io,
.init_irq = mx27_init_irq,
diff --git a/arch/arm/mach-mx2/mx27pdk.c b/arch/arm/mach-mx2/mx27pdk.c
index 6761d1b79e4..595fea46b6f 100644
--- a/arch/arm/mach-mx2/mx27pdk.c
+++ b/arch/arm/mach-mx2/mx27pdk.c
@@ -85,8 +85,8 @@ static struct sys_timer mx27pdk_timer = {
MACHINE_START(MX27_3DS, "Freescale MX27PDK")
/* maintainer: Freescale Semiconductor, Inc. */
- .phys_io = AIPI_BASE_ADDR,
- .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX27_AIPI_BASE_ADDR,
+ .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx27_map_io,
.init_irq = mx27_init_irq,
diff --git a/arch/arm/mach-mx2/mxt_td60.c b/arch/arm/mach-mx2/mxt_td60.c
index 8bcc1a5b882..9ed4e492fc7 100644
--- a/arch/arm/mach-mx2/mxt_td60.c
+++ b/arch/arm/mach-mx2/mxt_td60.c
@@ -284,8 +284,8 @@ static struct sys_timer mxt_td60_timer = {
MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
/* maintainer: Maxtrack Industrial */
- .phys_io = AIPI_BASE_ADDR,
- .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX27_AIPI_BASE_ADDR,
+ .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx27_map_io,
.init_irq = mx27_init_irq,
diff --git a/arch/arm/mach-mx2/pca100.c b/arch/arm/mach-mx2/pca100.c
index aea3d340d2e..55dbf5a64e0 100644
--- a/arch/arm/mach-mx2/pca100.c
+++ b/arch/arm/mach-mx2/pca100.c
@@ -233,8 +233,8 @@ static struct sys_timer pca100_timer = {
};
MACHINE_START(PCA100, "phyCARD-i.MX27")
- .phys_io = AIPI_BASE_ADDR,
- .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX27_AIPI_BASE_ADDR,
+ .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx27_map_io,
.init_irq = mx27_init_irq,
diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/pcm038.c
index 906d59b0a7a..a2e2ea16c13 100644
--- a/arch/arm/mach-mx2/pcm038.c
+++ b/arch/arm/mach-mx2/pcm038.c
@@ -108,8 +108,8 @@ static struct platdata_mtd_ram pcm038_sram_data = {
};
static struct resource pcm038_sram_resource = {
- .start = CS1_BASE_ADDR,
- .end = CS1_BASE_ADDR + 512 * 1024 - 1,
+ .start = MX27_CS1_BASE_ADDR,
+ .end = MX27_CS1_BASE_ADDR + 512 * 1024 - 1,
.flags = IORESOURCE_MEM,
};
@@ -328,8 +328,8 @@ static struct sys_timer pcm038_timer = {
};
MACHINE_START(PCM038, "phyCORE-i.MX27")
- .phys_io = AIPI_BASE_ADDR,
- .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX27_AIPI_BASE_ADDR,
+ .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx27_map_io,
.init_irq = mx27_init_irq,
diff --git a/arch/arm/mach-mx2/pcm970-baseboard.c b/arch/arm/mach-mx2/pcm970-baseboard.c
index 3cb7f457e5d..60d54465ada 100644
--- a/arch/arm/mach-mx2/pcm970-baseboard.c
+++ b/arch/arm/mach-mx2/pcm970-baseboard.c
@@ -190,8 +190,8 @@ static struct imx_fb_platform_data pcm038_fb_data = {
static struct resource pcm970_sja1000_resources[] = {
{
- .start = CS4_BASE_ADDR,
- .end = CS4_BASE_ADDR + 0x100 - 1,
+ .start = MX27_CS4_BASE_ADDR,
+ .end = MX27_CS4_BASE_ADDR + 0x100 - 1,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_GPIOE(19),
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2024-12-12 23:29:02 +0000