diff options
| -rw-r--r-- | arch/blackfin/kernel/bfin_gpio.c | 19 | ||||
| -rw-r--r-- | include/asm-blackfin/mach-bf537/portmux.h | 35 |
2 files changed, 45 insertions, 9 deletions
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c index 9f309480024..5d488ef965c 100644 --- a/arch/blackfin/kernel/bfin_gpio.c +++ b/arch/blackfin/kernel/bfin_gpio.c @@ -180,11 +180,13 @@ static int cmp_label(unsigned short ident, const char *label) #ifdef BF537_FAMILY static void port_setup(unsigned short gpio, unsigned short usage) { - if (usage == GPIO_USAGE) { - *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio); - } else - *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio); - SSYNC(); + if (!check_gpio(gpio)) { + if (usage == GPIO_USAGE) { + *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio); + } else + *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio); + SSYNC(); + } } #else # define port_setup(...) do { } while (0) @@ -644,11 +646,10 @@ int peripheral_request(unsigned short per, const char *label) if (!(per & P_DEFINED)) return -ENODEV; - if (check_gpio(ident) < 0) - return -EINVAL; - local_irq_save(flags); + if (!check_gpio(ident)) { + if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) { printk(KERN_ERR "%s: Peripheral %d is already reserved as GPIO by %s !\n", @@ -658,6 +659,8 @@ int peripheral_request(unsigned short per, const char *label) return -EBUSY; } + } + if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) { /* diff --git a/include/asm-blackfin/mach-bf537/portmux.h b/include/asm-blackfin/mach-bf537/portmux.h index 7daa2479a73..ae6c53b2845 100644 --- a/include/asm-blackfin/mach-bf537/portmux.h +++ b/include/asm-blackfin/mach-bf537/portmux.h @@ -106,4 +106,37 @@ #define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(PORT_PJ11) | P_FUNCT(1)) #define P_SPI0_SSEL7 (P_DEFINED | P_IDENT(PORT_PJ5) | P_FUNCT(2)) -#endif /* _MACH_PORTMUX_H_ */ +#define P_MII0 {\ + P_MII0_ETxD0, \ + P_MII0_ETxD1, \ + P_MII0_ETxD2, \ + P_MII0_ETxD3, \ + P_MII0_ETxEN, \ + P_MII0_TxCLK, \ + P_MII0_PHYINT, \ + P_MII0_COL, \ + P_MII0_ERxD0, \ + P_MII0_ERxD1, \ + P_MII0_ERxD2, \ + P_MII0_ERxD3, \ + P_MII0_ERxDV, \ + P_MII0_ERxCLK, \ + P_MII0_ERxER, \ + P_MII0_CRS, \ + P_MDC, \ + P_MDIO, 0} + + +#define P_RMII0 {\ + P_MII0_ETxD0, \ + P_MII0_ETxD1, \ + P_MII0_ETxEN, \ + P_MII0_ERxD0, \ + P_MII0_ERxD1, \ + P_MII0_ERxER, \ + P_RMII0_REF_CLK, \ + P_RMII0_MDINT, \ + P_RMII0_CRS_DV, \ + P_MDC, \ + P_MDIO, 0} +#endif /* _MACH_PORTMUX_H_ */ |