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authorSeungwhan Youn <sw.youn@samsung.com>2010-09-10 17:20:00 +0900
committerMark Brown <broonie@opensource.wolfsonmicro.com>2010-09-11 12:12:20 +0100
commit0cca9012527b77df1491f1b8422c7aae16e17ae0 (patch)
tree24bfa617495e3bee4da3a81fe696532b4566f285 /sound/soc/s3c24xx
parent6946e037ee9e94a560a931fdb2e3e66964216cfe (diff)
ASoC: S3C: Fix PCM RX FIFO settings
When PCM capture, sound recorded abnormally because of RX FIFO threshold settings are missing. So, This patch modify PCM RX FIFO setting codes same as TX. And for DMA, if PCM RXFIFO_DIPSTICK is not '0', it doesn't effect to DMA request, because DMA refer RX_FIFO_EMPTY flag as the DMA request. Signed-off-by: Seungwhan Youn <sw.youn@samsung.com> Acked-by: Jassi Brar <jassi.brar@samsung.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/s3c24xx')
-rw-r--r--sound/soc/s3c24xx/s3c-pcm.c3
-rw-r--r--sound/soc/s3c24xx/s3c-pcm.h3
2 files changed, 5 insertions, 1 deletions
diff --git a/sound/soc/s3c24xx/s3c-pcm.c b/sound/soc/s3c24xx/s3c-pcm.c
index 825645fbe4d..eadd1bebfe8 100644
--- a/sound/soc/s3c24xx/s3c-pcm.c
+++ b/sound/soc/s3c24xx/s3c-pcm.c
@@ -102,11 +102,14 @@ static void s3c_pcm_snd_rxctrl(struct s3c_pcm_info *pcm, int on)
ctl = readl(regs + S3C_PCM_CTL);
clkctl = readl(regs + S3C_PCM_CLKCTL);
+ ctl &= ~(S3C_PCM_CTL_RXDIPSTICK_MASK
+ << S3C_PCM_CTL_RXDIPSTICK_SHIFT);
if (on) {
ctl |= S3C_PCM_CTL_RXDMA_EN;
ctl |= S3C_PCM_CTL_RXFIFO_EN;
ctl |= S3C_PCM_CTL_ENABLE;
+ ctl |= (0x20<<S3C_PCM_CTL_RXDIPSTICK_SHIFT);
clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
} else {
ctl &= ~S3C_PCM_CTL_RXDMA_EN;
diff --git a/sound/soc/s3c24xx/s3c-pcm.h b/sound/soc/s3c24xx/s3c-pcm.h
index 69ff9971692..f60baa19387 100644
--- a/sound/soc/s3c24xx/s3c-pcm.h
+++ b/sound/soc/s3c24xx/s3c-pcm.h
@@ -22,7 +22,8 @@
/* PCM_CTL Bit-Fields */
#define S3C_PCM_CTL_TXDIPSTICK_MASK (0x3f)
#define S3C_PCM_CTL_TXDIPSTICK_SHIFT (13)
-#define S3C_PCM_CTL_RXDIPSTICK_MSK (0x3f<<7)
+#define S3C_PCM_CTL_RXDIPSTICK_MASK (0x3f)
+#define S3C_PCM_CTL_RXDIPSTICK_SHIFT (7)
#define S3C_PCM_CTL_TXDMA_EN (0x1<<6)
#define S3C_PCM_CTL_RXDMA_EN (0x1<<5)
#define S3C_PCM_CTL_TXMSB_AFTER_FSYNC (0x1<<4)