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authorXiubo Li <Li.Xiubo@freescale.com>2014-02-11 15:42:48 +0800
committerMark Brown <broonie@linaro.org>2014-02-12 15:31:45 +0000
commit86f28d76435b619bd0bc5f6fde2803a5bc27ca24 (patch)
treeaf128fa11e486bc5c4124435ae9735745851e2b7 /sound/soc/fsl
parent38dbfb59d1175ef458d006556061adeaa8751b72 (diff)
ASoC: fsl-spdif: big-endian support
For most platforms, the CPU and SPDIF device is in the same endianess mode. While for the LS1 platform, the CPU is in LE mode and the SPDIF is in BE mode. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound/soc/fsl')
-rw-r--r--sound/soc/fsl/fsl_spdif.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
index 4d075f1abe7..73ceb2f9b90 100644
--- a/sound/soc/fsl/fsl_spdif.c
+++ b/sound/soc/fsl/fsl_spdif.c
@@ -985,7 +985,7 @@ static bool fsl_spdif_writeable_reg(struct device *dev, unsigned int reg)
}
}
-static const struct regmap_config fsl_spdif_regmap_config = {
+static struct regmap_config fsl_spdif_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
@@ -1105,6 +1105,9 @@ static int fsl_spdif_probe(struct platform_device *pdev)
memcpy(&spdif_priv->cpu_dai_drv, &fsl_spdif_dai, sizeof(fsl_spdif_dai));
spdif_priv->cpu_dai_drv.name = spdif_priv->name;
+ if (of_property_read_bool(np, "big-endian"))
+ fsl_spdif_regmap_config.val_format_endian = REGMAP_ENDIAN_BIG;
+
/* Get the addresses and IRQ */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
regs = devm_ioremap_resource(&pdev->dev, res);