diff options
author | Len Brown <len.brown@intel.com> | 2009-04-05 02:14:15 -0400 |
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committer | Len Brown <len.brown@intel.com> | 2009-04-05 02:14:15 -0400 |
commit | 478c6a43fcbc6c11609f8cee7c7b57223907754f (patch) | |
tree | a7f7952099da60d33032aed6de9c0c56c9f8779e /sound/pci/pcxhr/pcxhr_mix22.c | |
parent | 8a3f257c704e02aee9869decd069a806b45be3f1 (diff) | |
parent | 6bb597507f9839b13498781e481f5458aea33620 (diff) |
Merge branch 'linus' into release
Conflicts:
arch/x86/kernel/cpu/cpufreq/longhaul.c
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'sound/pci/pcxhr/pcxhr_mix22.c')
-rw-r--r-- | sound/pci/pcxhr/pcxhr_mix22.c | 40 |
1 files changed, 36 insertions, 4 deletions
diff --git a/sound/pci/pcxhr/pcxhr_mix22.c b/sound/pci/pcxhr/pcxhr_mix22.c index ff019126b67..1cb82c0a9cb 100644 --- a/sound/pci/pcxhr/pcxhr_mix22.c +++ b/sound/pci/pcxhr/pcxhr_mix22.c @@ -53,6 +53,8 @@ #define PCXHR_DSP_RESET_DSP 0x01 #define PCXHR_DSP_RESET_MUTE 0x02 #define PCXHR_DSP_RESET_CODEC 0x08 +#define PCXHR_DSP_RESET_GPO_OFFSET 5 +#define PCXHR_DSP_RESET_GPO_MASK 0x60 /* values for PCHR_XLX_CFG register */ #define PCXHR_CFG_SYNCDSP_MASK 0x80 @@ -81,6 +83,8 @@ /* values for PCHR_XLX_STATUS register - READ */ #define PCXHR_STAT_SRC_LOCK 0x01 #define PCXHR_STAT_LEVEL_IN 0x02 +#define PCXHR_STAT_GPI_OFFSET 2 +#define PCXHR_STAT_GPI_MASK 0x0C #define PCXHR_STAT_MIC_CAPS 0x10 /* values for PCHR_XLX_STATUS register - WRITE */ #define PCXHR_STAT_FREQ_SYNC_MASK 0x01 @@ -291,10 +295,11 @@ int hr222_sub_init(struct pcxhr_mgr *mgr) PCXHR_OUTPB(mgr, PCXHR_DSP_RESET, PCXHR_DSP_RESET_DSP); msleep(5); - PCXHR_OUTPB(mgr, PCXHR_DSP_RESET, - PCXHR_DSP_RESET_DSP | - PCXHR_DSP_RESET_MUTE | - PCXHR_DSP_RESET_CODEC); + mgr->dsp_reset = PCXHR_DSP_RESET_DSP | + PCXHR_DSP_RESET_MUTE | + PCXHR_DSP_RESET_CODEC; + PCXHR_OUTPB(mgr, PCXHR_DSP_RESET, mgr->dsp_reset); + /* hr222_write_gpo(mgr, 0); does the same */ msleep(5); /* config AKM */ @@ -496,6 +501,33 @@ int hr222_get_external_clock(struct pcxhr_mgr *mgr, } +int hr222_read_gpio(struct pcxhr_mgr *mgr, int is_gpi, int *value) +{ + if (is_gpi) { + unsigned char reg = PCXHR_INPB(mgr, PCXHR_XLX_STATUS); + *value = (int)(reg & PCXHR_STAT_GPI_MASK) >> + PCXHR_STAT_GPI_OFFSET; + } else { + *value = (int)(mgr->dsp_reset & PCXHR_DSP_RESET_GPO_MASK) >> + PCXHR_DSP_RESET_GPO_OFFSET; + } + return 0; +} + + +int hr222_write_gpo(struct pcxhr_mgr *mgr, int value) +{ + unsigned char reg = mgr->dsp_reset & ~PCXHR_DSP_RESET_GPO_MASK; + + reg |= (unsigned char)(value << PCXHR_DSP_RESET_GPO_OFFSET) & + PCXHR_DSP_RESET_GPO_MASK; + + PCXHR_OUTPB(mgr, PCXHR_DSP_RESET, reg); + mgr->dsp_reset = reg; + return 0; +} + + int hr222_update_analog_audio_level(struct snd_pcxhr *chip, int is_capture, int channel) { |