Linux-2.6.12-rc2v2.6.12-rc2

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!

1 files changed, 2792 insertions, 0 deletions

diff --git a/sound/oss/sonicvibes.c b/sound/oss/sonicvibes.c
new file mode 100644
index 00000000000..e1d69611a25
--- /dev/null
+++ b/sound/oss/sonicvibes.c
@@ -0,0 +1,2792 @@
+/*****************************************************************************/
+
+/*
+ *      sonicvibes.c  --  S3 Sonic Vibes audio driver.
+ *
+ *      Copyright (C) 1998-2001, 2003  Thomas Sailer (t.sailer@alumni.ethz.ch)
+ *
+ *      This program is free software; you can redistribute it and/or modify
+ *      it under the terms of the GNU General Public License as published by
+ *      the Free Software Foundation; either version 2 of the License, or
+ *      (at your option) any later version.
+ *
+ *      This program is distributed in the hope that it will be useful,
+ *      but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *      GNU General Public License for more details.
+ *
+ *      You should have received a copy of the GNU General Public License
+ *      along with this program; if not, write to the Free Software
+ *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * Special thanks to David C. Niemi
+ *
+ *
+ * Module command line parameters:
+ *   none so far
+ *
+ *
+ *  Supported devices:
+ *  /dev/dsp    standard /dev/dsp device, (mostly) OSS compatible
+ *  /dev/mixer  standard /dev/mixer device, (mostly) OSS compatible
+ *  /dev/midi   simple MIDI UART interface, no ioctl
+ *
+ *  The card has both an FM and a Wavetable synth, but I have to figure
+ *  out first how to drive them...
+ *
+ *  Revision history
+ *    06.05.1998   0.1   Initial release
+ *    10.05.1998   0.2   Fixed many bugs, esp. ADC rate calculation
+ *                       First stab at a simple midi interface (no bells&whistles)
+ *    13.05.1998   0.3   Fix stupid cut&paste error: set_adc_rate was called instead of
+ *                       set_dac_rate in the FMODE_WRITE case in sv_open
+ *                       Fix hwptr out of bounds (now mpg123 works)
+ *    14.05.1998   0.4   Don't allow excessive interrupt rates
+ *    08.06.1998   0.5   First release using Alan Cox' soundcore instead of miscdevice
+ *    03.08.1998   0.6   Do not include modversions.h
+ *                       Now mixer behaviour can basically be selected between
+ *                       "OSS documented" and "OSS actual" behaviour
+ *    31.08.1998   0.7   Fix realplayer problems - dac.count issues
+ *    10.12.1998   0.8   Fix drain_dac trying to wait on not yet initialized DMA
+ *    16.12.1998   0.9   Fix a few f_file & FMODE_ bugs
+ *    06.01.1999   0.10  remove the silly SA_INTERRUPT flag.
+ *                       hopefully killed the egcs section type conflict
+ *    12.03.1999   0.11  cinfo.blocks should be reset after GETxPTR ioctl.
+ *                       reported by Johan Maes <joma@telindus.be>
+ *    22.03.1999   0.12  return EAGAIN instead of EBUSY when O_NONBLOCK
+ *                       read/write cannot be executed
+ *    05.04.1999   0.13  added code to sv_read and sv_write which should detect
+ *                       lockups of the sound chip and revive it. This is basically
+ *                       an ugly hack, but at least applications using this driver
+ *                       won't hang forever. I don't know why these lockups happen,
+ *                       it might well be the motherboard chipset (an early 486 PCI
+ *                       board with ALI chipset), since every busmastering 100MB
+ *                       ethernet card I've tried (Realtek 8139 and Macronix tulip clone)
+ *                       exhibit similar behaviour (they work for a couple of packets
+ *                       and then lock up and can be revived by ifconfig down/up).
+ *    07.04.1999   0.14  implemented the following ioctl's: SOUND_PCM_READ_RATE, 
+ *                       SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS; 
+ *                       Alpha fixes reported by Peter Jones <pjones@redhat.com>
+ *                       Note: dmaio hack might still be wrong on archs other than i386
+ *    15.06.1999   0.15  Fix bad allocation bug.
+ *                       Thanks to Deti Fliegl <fliegl@in.tum.de>
+ *    28.06.1999   0.16  Add pci_set_master
+ *    03.08.1999   0.17  adapt to Linus' new __setup/__initcall
+ *                       added kernel command line options "sonicvibes=reverb" and "sonicvibesdmaio=dmaioaddr"
+ *    12.08.1999   0.18  module_init/__setup fixes
+ *    24.08.1999   0.19  get rid of the dmaio kludge, replace with allocate_resource
+ *    31.08.1999   0.20  add spin_lock_init
+ *                       use new resource allocation to allocate DDMA IO space
+ *                       replaced current->state = x with set_current_state(x)
+ *    03.09.1999   0.21  change read semantics for MIDI to match
+ *                       OSS more closely; remove possible wakeup race
+ *    28.10.1999   0.22  More waitqueue races fixed
+ *    01.12.1999   0.23  New argument to allocate_resource
+ *    07.12.1999   0.24  More allocate_resource semantics change
+ *    08.01.2000   0.25  Prevent some ioctl's from returning bad count values on underrun/overrun;
+ *                       Tim Janik's BSE (Bedevilled Sound Engine) found this
+ *                       use Martin Mares' pci_assign_resource
+ *    07.02.2000   0.26  Use pci_alloc_consistent and pci_register_driver
+ *    21.11.2000   0.27  Initialize dma buffers in poll, otherwise poll may return a bogus mask
+ *    12.12.2000   0.28  More dma buffer initializations, patch from
+ *                       Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
+ *    31.01.2001   0.29  Register/Unregister gameport
+ *                       Fix SETTRIGGER non OSS API conformity
+ *    18.05.2001   0.30  PCI probing and error values cleaned up by Marcus
+ *                       Meissner <mm@caldera.de>
+ *    03.01.2003   0.31  open_mode fixes from Georg Acher <acher@in.tum.de>
+ *
+ */
+
+/*****************************************************************************/
+      
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/wait.h>
+#include <linux/mm.h>
+#include <linux/delay.h>
+#include <linux/sound.h>
+#include <linux/slab.h>
+#include <linux/soundcard.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/poll.h>
+#include <linux/spinlock.h>
+#include <linux/smp_lock.h>
+#include <linux/gameport.h>
+
+#include <asm/io.h>
+#include <asm/uaccess.h>
+
+#include "dm.h"
+
+
+/* --------------------------------------------------------------------- */
+
+#undef OSS_DOCUMENTED_MIXER_SEMANTICS
+
+/* --------------------------------------------------------------------- */
+
+#ifndef PCI_VENDOR_ID_S3
+#define PCI_VENDOR_ID_S3             0x5333
+#endif
+#ifndef PCI_DEVICE_ID_S3_SONICVIBES
+#define PCI_DEVICE_ID_S3_SONICVIBES  0xca00
+#endif
+
+#define SV_MAGIC  ((PCI_VENDOR_ID_S3<<16)|PCI_DEVICE_ID_S3_SONICVIBES)
+
+#define SV_EXTENT_SB      0x10
+#define SV_EXTENT_ENH     0x10
+#define SV_EXTENT_SYNTH   0x4
+#define SV_EXTENT_MIDI    0x4
+#define SV_EXTENT_GAME    0x8
+#define SV_EXTENT_DMA     0x10
+
+/*
+ * we are not a bridge and thus use a resource for DDMA that is used for bridges but
+ * left empty for normal devices
+ */
+#define RESOURCE_SB       0
+#define RESOURCE_ENH      1
+#define RESOURCE_SYNTH    2
+#define RESOURCE_MIDI     3
+#define RESOURCE_GAME     4
+#define RESOURCE_DDMA     7
+
+#define SV_MIDI_DATA      0
+#define SV_MIDI_COMMAND   1
+#define SV_MIDI_STATUS    1
+
+#define SV_DMA_ADDR0      0
+#define SV_DMA_ADDR1      1
+#define SV_DMA_ADDR2      2
+#define SV_DMA_ADDR3      3
+#define SV_DMA_COUNT0     4
+#define SV_DMA_COUNT1     5
+#define SV_DMA_COUNT2     6
+#define SV_DMA_MODE       0xb
+#define SV_DMA_RESET      0xd
+#define SV_DMA_MASK       0xf
+
+/*
+ * DONT reset the DMA controllers unless you understand
+ * the reset semantics. Assuming reset semantics as in
+ * the 8237 does not work.
+ */
+
+#define DMA_MODE_AUTOINIT 0x10
+#define DMA_MODE_READ     0x44    /* I/O to memory, no autoinit, increment, single mode */
+#define DMA_MODE_WRITE    0x48    /* memory to I/O, no autoinit, increment, single mode */
+
+#define SV_CODEC_CONTROL  0
+#define SV_CODEC_INTMASK  1
+#define SV_CODEC_STATUS   2
+#define SV_CODEC_IADDR    4
+#define SV_CODEC_IDATA    5
+
+#define SV_CCTRL_RESET      0x80
+#define SV_CCTRL_INTADRIVE  0x20
+#define SV_CCTRL_WAVETABLE  0x08
+#define SV_CCTRL_REVERB     0x04
+#define SV_CCTRL_ENHANCED   0x01
+
+#define SV_CINTMASK_DMAA    0x01
+#define SV_CINTMASK_DMAC    0x04
+#define SV_CINTMASK_SPECIAL 0x08
+#define SV_CINTMASK_UPDOWN  0x40
+#define SV_CINTMASK_MIDI    0x80
+
+#define SV_CSTAT_DMAA       0x01
+#define SV_CSTAT_DMAC	    0x04
+#define SV_CSTAT_SPECIAL    0x08
+#define SV_CSTAT_UPDOWN	    0x40
+#define SV_CSTAT_MIDI	    0x80
+
+#define SV_CIADDR_TRD       0x80
+#define SV_CIADDR_MCE       0x40
+
+/* codec indirect registers */
+#define SV_CIMIX_ADCINL     0x00
+#define SV_CIMIX_ADCINR     0x01
+#define SV_CIMIX_AUX1INL    0x02
+#define SV_CIMIX_AUX1INR    0x03
+#define SV_CIMIX_CDINL      0x04
+#define SV_CIMIX_CDINR      0x05
+#define SV_CIMIX_LINEINL    0x06
+#define SV_CIMIX_LINEINR    0x07
+#define SV_CIMIX_MICIN      0x08
+#define SV_CIMIX_SYNTHINL   0x0A
+#define SV_CIMIX_SYNTHINR   0x0B
+#define SV_CIMIX_AUX2INL    0x0C
+#define SV_CIMIX_AUX2INR    0x0D
+#define SV_CIMIX_ANALOGINL  0x0E
+#define SV_CIMIX_ANALOGINR  0x0F
+#define SV_CIMIX_PCMINL     0x10
+#define SV_CIMIX_PCMINR     0x11
+
+#define SV_CIGAMECONTROL    0x09
+#define SV_CIDATAFMT        0x12
+#define SV_CIENABLE         0x13
+#define SV_CIUPDOWN         0x14
+#define SV_CIREVISION       0x15
+#define SV_CIADCOUTPUT      0x16
+#define SV_CIDMAABASECOUNT1 0x18
+#define SV_CIDMAABASECOUNT0 0x19
+#define SV_CIDMACBASECOUNT1 0x1c
+#define SV_CIDMACBASECOUNT0 0x1d
+#define SV_CIPCMSR0         0x1e
+#define SV_CIPCMSR1         0x1f
+#define SV_CISYNTHSR0       0x20
+#define SV_CISYNTHSR1       0x21
+#define SV_CIADCCLKSOURCE   0x22
+#define SV_CIADCALTSR       0x23
+#define SV_CIADCPLLM        0x24
+#define SV_CIADCPLLN        0x25
+#define SV_CISYNTHPLLM      0x26
+#define SV_CISYNTHPLLN      0x27
+#define SV_CIUARTCONTROL    0x2a
+#define SV_CIDRIVECONTROL   0x2b
+#define SV_CISRSSPACE       0x2c
+#define SV_CISRSCENTER      0x2d
+#define SV_CIWAVETABLESRC   0x2e
+#define SV_CIANALOGPWRDOWN  0x30
+#define SV_CIDIGITALPWRDOWN 0x31
+
+
+#define SV_CIMIX_ADCSRC_CD     0x20
+#define SV_CIMIX_ADCSRC_DAC    0x40
+#define SV_CIMIX_ADCSRC_AUX2   0x60
+#define SV_CIMIX_ADCSRC_LINE   0x80
+#define SV_CIMIX_ADCSRC_AUX1   0xa0
+#define SV_CIMIX_ADCSRC_MIC    0xc0
+#define SV_CIMIX_ADCSRC_MIXOUT 0xe0
+#define SV_CIMIX_ADCSRC_MASK   0xe0
+
+#define SV_CFMT_STEREO     0x01
+#define SV_CFMT_16BIT      0x02
+#define SV_CFMT_MASK       0x03
+#define SV_CFMT_ASHIFT     0   
+#define SV_CFMT_CSHIFT     4
+
+static const unsigned sample_size[] = { 1, 2, 2, 4 };
+static const unsigned sample_shift[] = { 0, 1, 1, 2 };
+
+#define SV_CENABLE_PPE     0x4
+#define SV_CENABLE_RE      0x2
+#define SV_CENABLE_PE      0x1
+
+
+/* MIDI buffer sizes */
+
+#define MIDIINBUF  256
+#define MIDIOUTBUF 256
+
+#define FMODE_MIDI_SHIFT 2
+#define FMODE_MIDI_READ  (FMODE_READ << FMODE_MIDI_SHIFT)
+#define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
+
+#define FMODE_DMFM 0x10
+
+/* --------------------------------------------------------------------- */
+
+struct sv_state {
+	/* magic */
+	unsigned int magic;
+
+	/* list of sonicvibes devices */
+	struct list_head devs;
+
+	/* the corresponding pci_dev structure */
+	struct pci_dev *dev;
+
+	/* soundcore stuff */
+	int dev_audio;
+	int dev_mixer;
+	int dev_midi;
+	int dev_dmfm;
+
+	/* hardware resources */
+	unsigned long iosb, ioenh, iosynth, iomidi;  /* long for SPARC */
+	unsigned int iodmaa, iodmac, irq;
+
+        /* mixer stuff */
+        struct {
+                unsigned int modcnt;
+#ifndef OSS_DOCUMENTED_MIXER_SEMANTICS
+		unsigned short vol[13];
+#endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
+        } mix;
+
+	/* wave stuff */
+	unsigned int rateadc, ratedac;
+	unsigned char fmt, enable;
+
+	spinlock_t lock;
+	struct semaphore open_sem;
+	mode_t open_mode;
+	wait_queue_head_t open_wait;
+
+	struct dmabuf {
+		void *rawbuf;
+		dma_addr_t dmaaddr;
+		unsigned buforder;
+		unsigned numfrag;
+		unsigned fragshift;
+		unsigned hwptr, swptr;
+		unsigned total_bytes;
+		int count;
+		unsigned error; /* over/underrun */
+		wait_queue_head_t wait;
+		/* redundant, but makes calculations easier */
+		unsigned fragsize;
+		unsigned dmasize;
+		unsigned fragsamples;
+		/* OSS stuff */
+		unsigned mapped:1;
+		unsigned ready:1;
+		unsigned endcleared:1;
+		unsigned enabled:1;
+		unsigned ossfragshift;
+		int ossmaxfrags;
+		unsigned subdivision;
+	} dma_dac, dma_adc;
+
+	/* midi stuff */
+	struct {
+		unsigned ird, iwr, icnt;
+		unsigned ord, owr, ocnt;
+		wait_queue_head_t iwait;
+		wait_queue_head_t owait;
+		struct timer_list timer;
+		unsigned char ibuf[MIDIINBUF];
+		unsigned char obuf[MIDIOUTBUF];
+	} midi;
+
+	struct gameport *gameport;
+};
+
+/* --------------------------------------------------------------------- */
+
+static LIST_HEAD(devs);
+static unsigned long wavetable_mem;
+
+/* --------------------------------------------------------------------- */
+
+static inline unsigned ld2(unsigned int x)
+{
+	unsigned r = 0;
+	
+	if (x >= 0x10000) {
+		x >>= 16;
+		r += 16;
+	}
+	if (x >= 0x100) {
+		x >>= 8;
+		r += 8;
+	}
+	if (x >= 0x10) {
+		x >>= 4;
+		r += 4;
+	}
+	if (x >= 4) {
+		x >>= 2;
+		r += 2;
+	}
+	if (x >= 2)
+		r++;
+	return r;
+}
+
+/*
+ * hweightN: returns the hamming weight (i.e. the number
+ * of bits set) of a N-bit word
+ */
+
+#ifdef hweight32
+#undef hweight32
+#endif
+
+static inline unsigned int hweight32(unsigned int w)
+{
+        unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555);
+        res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
+        res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F);
+        res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF);
+        return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF);
+}
+
+/* --------------------------------------------------------------------- */
+
+/*
+ * Why use byte IO? Nobody knows, but S3 does it also in their Windows driver.
+ */
+
+#undef DMABYTEIO
+
+static void set_dmaa(struct sv_state *s, unsigned int addr, unsigned int count)
+{
+#ifdef DMABYTEIO
+	unsigned io = s->iodmaa, u;
+
+	count--;
+	for (u = 4; u > 0; u--, addr >>= 8, io++)
+		outb(addr & 0xff, io);
+	for (u = 3; u > 0; u--, count >>= 8, io++)
+		outb(count & 0xff, io);
+#else /* DMABYTEIO */
+	count--;
+	outl(addr, s->iodmaa + SV_DMA_ADDR0);
+	outl(count, s->iodmaa + SV_DMA_COUNT0);
+#endif /* DMABYTEIO */
+	outb(0x18, s->iodmaa + SV_DMA_MODE);
+}
+
+static void set_dmac(struct sv_state *s, unsigned int addr, unsigned int count)
+{
+#ifdef DMABYTEIO
+	unsigned io = s->iodmac, u;
+
+	count >>= 1;
+	count--;
+	for (u = 4; u > 0; u--, addr >>= 8, io++)
+		outb(addr & 0xff, io);
+	for (u = 3; u > 0; u--, count >>= 8, io++)
+		outb(count & 0xff, io);
+#else /* DMABYTEIO */
+	count >>= 1;
+	count--;
+	outl(addr, s->iodmac + SV_DMA_ADDR0);
+	outl(count, s->iodmac + SV_DMA_COUNT0);
+#endif /* DMABYTEIO */
+	outb(0x14, s->iodmac + SV_DMA_MODE);
+}
+
+static inline unsigned get_dmaa(struct sv_state *s)
+{
+#ifdef DMABYTEIO
+	unsigned io = s->iodmaa+6, v = 0, u;
+
+	for (u = 3; u > 0; u--, io--) {
+		v <<= 8;
+		v |= inb(io);
+	}
+	return v + 1;
+#else /* DMABYTEIO */
+	return (inl(s->iodmaa + SV_DMA_COUNT0) & 0xffffff) + 1;
+#endif /* DMABYTEIO */
+}
+
+static inline unsigned get_dmac(struct sv_state *s)
+{
+#ifdef DMABYTEIO
+	unsigned io = s->iodmac+6, v = 0, u;
+
+	for (u = 3; u > 0; u--, io--) {
+		v <<= 8;
+		v |= inb(io);
+	}
+	return (v + 1) << 1;
+#else /* DMABYTEIO */
+	return ((inl(s->iodmac + SV_DMA_COUNT0) & 0xffffff) + 1) << 1;
+#endif /* DMABYTEIO */
+}
+
+static void wrindir(struct sv_state *s, unsigned char idx, unsigned char data)
+{
+	outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
+	udelay(10);
+	outb(data, s->ioenh + SV_CODEC_IDATA);
+	udelay(10);
+}
+
+static unsigned char rdindir(struct sv_state *s, unsigned char idx)
+{
+	unsigned char v;
+
+	outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
+	udelay(10);
+	v = inb(s->ioenh + SV_CODEC_IDATA);
+	udelay(10);
+	return v;
+}
+
+static void set_fmt(struct sv_state *s, unsigned char mask, unsigned char data)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&s->lock, flags);
+	outb(SV_CIDATAFMT | SV_CIADDR_MCE, s->ioenh + SV_CODEC_IADDR);
+	if (mask) {
+		s->fmt = inb(s->ioenh + SV_CODEC_IDATA);
+		udelay(10);
+	}
+	s->fmt = (s->fmt & mask) | data;
+	outb(s->fmt, s->ioenh + SV_CODEC_IDATA);
+	udelay(10);
+	outb(0, s->ioenh + SV_CODEC_IADDR);
+	spin_unlock_irqrestore(&s->lock, flags);
+	udelay(10);
+}
+
+static void frobindir(struct sv_state *s, unsigned char idx, unsigned char mask, unsigned char data)
+{
+	outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
+	udelay(10);
+	outb((inb(s->ioenh + SV_CODEC_IDATA) & mask) ^ data, s->ioenh + SV_CODEC_IDATA);
+	udelay(10);
+}
+
+#define REFFREQUENCY  24576000
+#define ADCMULT 512
+#define FULLRATE 48000
+
+static unsigned setpll(struct sv_state *s, unsigned char reg, unsigned rate)
+{
+	unsigned long flags;
+	unsigned char r, m=0, n=0;
+	unsigned xm, xn, xr, xd, metric = ~0U;
+	/* the warnings about m and n used uninitialized are bogus and may safely be ignored */
+
+	if (rate < 625000/ADCMULT)
+		rate = 625000/ADCMULT;
+	if (rate > 150000000/ADCMULT)
+		rate = 150000000/ADCMULT;
+	/* slight violation of specs, needed for continuous sampling rates */
+	for (r = 0; rate < 75000000/ADCMULT; r += 0x20, rate <<= 1);
+	for (xn = 3; xn < 35; xn++)
+		for (xm = 3; xm < 130; xm++) {
+			xr = REFFREQUENCY/ADCMULT * xm / xn;
+			xd = abs((signed)(xr - rate));
+			if (xd < metric) {
+				metric = xd;
+				m = xm - 2;
+				n = xn - 2;
+			}
+		}
+	reg &= 0x3f;
+	spin_lock_irqsave(&s->lock, flags);
+	outb(reg, s->ioenh + SV_CODEC_IADDR);
+	udelay(10);
+	outb(m, s->ioenh + SV_CODEC_IDATA);
+	udelay(10);
+	outb(reg+1, s->ioenh + SV_CODEC_IADDR);
+	udelay(10);
+	outb(r | n, s->ioenh + SV_CODEC_IDATA);
+	spin_unlock_irqrestore(&s->lock, flags);
+	udelay(10);
+	return (REFFREQUENCY/ADCMULT * (m + 2) / (n + 2)) >> ((r >> 5) & 7);
+}
+
+#if 0
+
+static unsigned getpll(struct sv_state *s, unsigned char reg)
+{
+	unsigned long flags;
+	unsigned char m, n;
+
+	reg &= 0x3f;
+	spin_lock_irqsave(&s->lock, flags);
+	outb(reg, s->ioenh + SV_CODEC_IADDR);
+	udelay(10);
+	m = inb(s->ioenh + SV_CODEC_IDATA);
+	udelay(10);
+	outb(reg+1, s->ioenh + SV_CODEC_IADDR);
+	udelay(10);
+	n = inb(s->ioenh + SV_CODEC_IDATA);
+	spin_unlock_irqrestore(&s->lock, flags);
+	udelay(10);
+	return (REFFREQUENCY/ADCMULT * (m + 2) / ((n & 0x1f) + 2)) >> ((n >> 5) & 7);
+}
+
+#endif
+
+static void set_dac_rate(struct sv_state *s, unsigned rate)
+{
+	unsigned div;
+	unsigned long flags;
+
+	if (rate > 48000)
+		rate = 48000;
+	if (rate < 4000)
+		rate = 4000;
+	div = (rate * 65536 + FULLRATE/2) / FULLRATE;
+	if (div > 65535)
+		div = 65535;
+	spin_lock_irqsave(&s->lock, flags);
+	wrindir(s, SV_CIPCMSR1, div >> 8);
+	wrindir(s, SV_CIPCMSR0, div);
+	spin_unlock_irqrestore(&s->lock, flags);
+	s->ratedac = (div * FULLRATE + 32768) / 65536;
+}
+
+static void set_adc_rate(struct sv_state *s, unsigned rate)
+{
+	unsigned long flags;
+	unsigned rate1, rate2, div;
+
+	if (rate > 48000)
+		rate = 48000;
+	if (rate < 4000)
+		rate = 4000;
+	rate1 = setpll(s, SV_CIADCPLLM, rate);
+	div = (48000 + rate/2) / rate;
+	if (div > 8)
+		div = 8;
+	rate2 = (48000 + div/2) / div;
+	spin_lock_irqsave(&s->lock, flags);
+	wrindir(s, SV_CIADCALTSR, (div-1) << 4);
+	if (abs((signed)(rate-rate2)) <= abs((signed)(rate-rate1))) {
+		wrindir(s, SV_CIADCCLKSOURCE, 0x10);
+		s->rateadc = rate2;
+	} else {
+		wrindir(s, SV_CIADCCLKSOURCE, 0x00);
+		s->rateadc = rate1;
+	}
+	spin_unlock_irqrestore(&s->lock, flags);
+}
+
+/* --------------------------------------------------------------------- */
+
+static inline void stop_adc(struct sv_state *s)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&s->lock, flags);
+	s->enable &= ~SV_CENABLE_RE;
+	wrindir(s, SV_CIENABLE, s->enable);
+	spin_unlock_irqrestore(&s->lock, flags);
+}	
+
+static inline void stop_dac(struct sv_state *s)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&s->lock, flags);
+	s->enable &= ~(SV_CENABLE_PPE | SV_CENABLE_PE);
+	wrindir(s, SV_CIENABLE, s->enable);
+	spin_unlock_irqrestore(&s->lock, flags);
+}	
+
+static void start_dac(struct sv_state *s)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&s->lock, flags);
+	if ((s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
+		s->enable = (s->enable & ~SV_CENABLE_PPE) | SV_CENABLE_PE;
+		wrindir(s, SV_CIENABLE, s->enable);
+	}
+	spin_unlock_irqrestore(&s->lock, flags);
+}	
+
+static void start_adc(struct sv_state *s)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&s->lock, flags);
+	if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize)) 
+	    && s->dma_adc.ready) {
+		s->enable |= SV_CENABLE_RE;
+		wrindir(s, SV_CIENABLE, s->enable);
+	}
+	spin_unlock_irqrestore(&s->lock, flags);
+}	
+
+/* --------------------------------------------------------------------- */
+
+#define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
+#define DMABUF_MINORDER 1
+
+static void dealloc_dmabuf(struct sv_state *s, struct dmabuf *db)
+{
+	struct page *page, *pend;
+
+	if (db->rawbuf) {
+		/* undo marking the pages as reserved */
+		pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
+		for (page = virt_to_page(db->rawbuf); page <= pend; page++)
+			ClearPageReserved(page);
+		pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
+	}
+	db->rawbuf = NULL;
+	db->mapped = db->ready = 0;
+}
+
+
+/* DMAA is used for playback, DMAC is used for recording */
+
+static int prog_dmabuf(struct sv_state *s, unsigned rec)
+{
+	struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
+	unsigned rate = rec ? s->rateadc : s->ratedac;
+	int order;
+	unsigned bytepersec;
+	unsigned bufs;
+	struct page *page, *pend;
+	unsigned char fmt;
+	unsigned long flags;
+
+	spin_lock_irqsave(&s->lock, flags);
+	fmt = s->fmt;
+	if (rec) {
+		s->enable &= ~SV_CENABLE_RE;
+		fmt >>= SV_CFMT_CSHIFT;
+	} else {
+		s->enable &= ~SV_CENABLE_PE;
+		fmt >>= SV_CFMT_ASHIFT;
+	}
+	wrindir(s, SV_CIENABLE, s->enable);
+	spin_unlock_irqrestore(&s->lock, flags);
+	fmt &= SV_CFMT_MASK;
+	db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
+	if (!db->rawbuf) {
+		db->ready = db->mapped = 0;
+		for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
+			if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
+				break;
+		if (!db->rawbuf)
+			return -ENOMEM;
+		db->buforder = order;
+		if ((virt_to_bus(db->rawbuf) ^ (virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1)) & ~0xffff)
+			printk(KERN_DEBUG "sv: DMA buffer crosses 64k boundary: busaddr 0x%lx  size %ld\n", 
+			       virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
+		if ((virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1) & ~0xffffff)
+			printk(KERN_DEBUG "sv: DMA buffer beyond 16MB: busaddr 0x%lx  size %ld\n", 
+			       virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
+		/* now mark the pages as reserved; otherwise remap_pfn_range doesn't do what we want */
+		pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
+		for (page = virt_to_page(db->rawbuf); page <= pend; page++)
+			SetPageReserved(page);
+	}
+	bytepersec = rate << sample_shift[fmt];
+	bufs = PAGE_SIZE << db->buforder;
+	if (db->ossfragshift) {
+		if ((1000 << db->ossfragshift) < bytepersec)
+			db->fragshift = ld2(bytepersec/1000);
+		else
+			db->fragshift = db->ossfragshift;
+	} else {
+		db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
+		if (db->fragshift < 3)
+			db->fragshift = 3;
+	}
+	db->numfrag = bufs >> db->fragshift;
+	while (db->numfrag < 4 && db->fragshift > 3) {
+		db->fragshift--;
+		db->numfrag = bufs >> db->fragshift;
+	}
+	db->fragsize = 1 << db->fragshift;
+	if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
+		db->numfrag = db->ossmaxfrags;
+	db->fragsamples = db->fragsize >> sample_shift[fmt];
+	db->dmasize = db->numfrag << db->fragshift;
+	memset(db->rawbuf, (fmt & SV_CFMT_16BIT) ? 0 : 0x80, db->dmasize);
+	spin_lock_irqsave(&s->lock, flags);
+	if (rec) {
+		set_dmac(s, db->dmaaddr, db->numfrag << db->fragshift);
+		/* program enhanced mode registers */
+		wrindir(s, SV_CIDMACBASECOUNT1, (db->fragsamples-1) >> 8);
+		wrindir(s, SV_CIDMACBASECOUNT0, db->fragsamples-1);
+	} else {
+		set_dmaa(s, db->dmaaddr, db->numfrag << db->fragshift);
+		/* program enhanced mode registers */
+		wrindir(s, SV_CIDMAABASECOUNT1, (db->fragsamples-1) >> 8);
+		wrindir(s, SV_CIDMAABASECOUNT0, db->fragsamples-1);
+	}
+	spin_unlock_irqrestore(&s->lock, flags);
+	db->enabled = 1;
+	db->ready = 1;
+	return 0;
+}
+
+static inline void clear_advance(struct sv_state *s)
+{
+	unsigned char c = (s->fmt & (SV_CFMT_16BIT << SV_CFMT_ASHIFT)) ? 0 : 0x80;
+	unsigned char *buf = s->dma_dac.rawbuf;
+	unsigned bsize = s->dma_dac.dmasize;
+	unsigned bptr = s->dma_dac.swptr;
+	unsigned len = s->dma_dac.fragsize;
+
+	if (bptr + len > bsize) {
+		unsigned x = bsize - bptr;
+		memset(buf + bptr, c, x);
+		bptr = 0;
+		len -= x;
+	}
+	memset(buf + bptr, c, len);
+}
+
+/* call with spinlock held! */
+static void sv_update_ptr(struct sv_state *s)
+{
+	unsigned hwptr;
+	int diff;
+
+	/* update ADC pointer */
+	if (s->dma_adc.ready) {
+		hwptr = (s->dma_adc.dmasize - get_dmac(s)) % s->dma_adc.dmasize;
+		diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
+		s->dma_adc.hwptr = hwptr;
+		s->dma_adc.total_bytes += diff;
+		s->dma_adc.count += diff;
+		if (s->dma_adc.count >= (signed)s->dma_adc.fragsize) 
+			wake_up(&s->dma_adc.wait);
+		if (!s->dma_adc.mapped) {
+			if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
+				s->enable &= ~SV_CENABLE_RE;
+				wrindir(s, SV_CIENABLE, s->enable);
+				s->dma_adc.error++;
+			}
+		}
+	}
+	/* update DAC pointer */
+	if (s->dma_dac.ready) {
+		hwptr = (s->dma_dac.dmasize - get_dmaa(s)) % s->dma_dac.dmasize;
+		diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
+		s->dma_dac.hwptr = hwptr;
+		s->dma_dac.total_bytes += diff;
+		if (s->dma_dac.mapped) {
+			s->dma_dac.count += diff;
+			if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
+				wake_up(&s->dma_dac.wait);
+		} else {
+			s->dma_dac.count -= diff;
+			if (s->dma_dac.count <= 0) {
+				s->enable &= ~SV_CENABLE_PE;
+				wrindir(s, SV_CIENABLE, s->enable);
+				s->dma_dac.error++;
+			} else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
+				clear_advance(s);
+				s->dma_dac.endcleared = 1;
+			}
+			if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
+				wake_up(&s->dma_dac.wait);
+		}
+	}
+}
+
+/* hold spinlock for the following! */
+static void sv_handle_midi(struct sv_state *s)
+{
+	unsigned char ch;
+	int wake;
+
+	wake = 0;
+	while (!(inb(s->iomidi+1) & 0x80)) {
+		ch = inb(s->iomidi);
+		if (s->midi.icnt < MIDIINBUF) {
+			s->midi.ibuf[s->midi.iwr] = ch;
+			s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
+			s->midi.icnt++;
+		}
+		wake = 1;
+	}
+	if (wake)
+		wake_up(&s->midi.iwait);
+	wake = 0;
+	while (!(inb(s->iomidi+1) & 0x40) && s->midi.ocnt > 0) {
+		outb(s->midi.obuf[s->midi.ord], s->iomidi);
+		s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
+		s->midi.ocnt--;
+		if (s->midi.ocnt < MIDIOUTBUF-16)
+			wake = 1;
+	}
+	if (wake)
+		wake_up(&s->midi.owait);
+}
+
+static irqreturn_t sv_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+        struct sv_state *s = (struct sv_state *)dev_id;
+	unsigned int intsrc;
+	
+	/* fastpath out, to ease interrupt sharing */
+	intsrc = inb(s->ioenh + SV_CODEC_STATUS);
+	if (!(intsrc & (SV_CSTAT_DMAA | SV_CSTAT_DMAC | SV_CSTAT_MIDI)))
+		return IRQ_NONE;
+	spin_lock(&s->lock);
+	sv_update_ptr(s);
+	sv_handle_midi(s);
+	spin_unlock(&s->lock);
+	return IRQ_HANDLED;
+}
+
+static void sv_midi_timer(unsigned long data)
+{
+	struct sv_state *s = (struct sv_state *)data;
+	unsigned long flags;
+	
+	spin_lock_irqsave(&s->lock, flags);
+	sv_handle_midi(s);
+	spin_unlock_irqrestore(&s->lock, flags);
+	s->midi.timer.expires = jiffies+1;
+	add_timer(&s->midi.timer);
+}
+
+/* --------------------------------------------------------------------- */
+
+static const char invalid_magic[] = KERN_CRIT "sv: invalid magic value\n";
+
+#define VALIDATE_STATE(s)                         \
+({                                                \
+	if (!(s) || (s)->magic != SV_MAGIC) { \
+		printk(invalid_magic);            \
+		return -ENXIO;                    \
+	}                                         \
+})
+
+/* --------------------------------------------------------------------- */
+
+#define MT_4          1
+#define MT_5MUTE      2
+#define MT_4MUTEMONO  3
+#define MT_6MUTE      4
+
+static const struct {
+	unsigned left:5;
+	unsigned right:5;
+	unsigned type:3;
+	unsigned rec:3;
+} mixtable[SOUND_MIXER_NRDEVICES] = {
+	[SOUND_MIXER_RECLEV] = { SV_CIMIX_ADCINL,    SV_CIMIX_ADCINR,    MT_4,         0 },
+	[SOUND_MIXER_LINE1]  = { SV_CIMIX_AUX1INL,   SV_CIMIX_AUX1INR,   MT_5MUTE,     5 },
+	[SOUND_MIXER_CD]     = { SV_CIMIX_CDINL,     SV_CIMIX_CDINR,     MT_5MUTE,     1 },
+	[SOUND_MIXER_LINE]   = { SV_CIMIX_LINEINL,   SV_CIMIX_LINEINR,   MT_5MUTE,     4 },
+	[SOUND_MIXER_MIC]    = { SV_CIMIX_MICIN,     SV_CIMIX_ADCINL,    MT_4MUTEMONO, 6 },
+	[SOUND_MIXER_SYNTH]  = { SV_CIMIX_SYNTHINL,  SV_CIMIX_SYNTHINR,  MT_5MUTE,     2 },
+	[SOUND_MIXER_LINE2]  = { SV_CIMIX_AUX2INL,   SV_CIMIX_AUX2INR,   MT_5MUTE,     3 },
+	[SOUND_MIXER_VOLUME] = { SV_CIMIX_ANALOGINL, SV_CIMIX_ANALOGINR, MT_5MUTE,     7 },
+	[SOUND_MIXER_PCM]    = { SV_CIMIX_PCMINL,    SV_CIMIX_PCMINR,    MT_6MUTE,     0 }
+};
+
+#ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
+
+static int return_mixval(struct sv_state *s, unsigned i, int *arg)
+{
+	unsigned long flags;
+	unsigned char l, r, rl, rr;
+
+	spin_lock_irqsave(&s->lock, flags);
+	l = rdindir(s, mixtable[i].left);
+	r = rdindir(s, mixtable[i].right);
+	spin_unlock_irqrestore(&s->lock, flags);
+	switch (mixtable[i].type) {
+	case MT_4:
+		r &= 0xf;
+		l &= 0xf;
+		rl = 10 + 6 * (l & 15);
+		rr = 10 + 6 * (r & 15);
+		break;
+
+	case MT_4MUTEMONO:
+		rl = 55 - 3 * (l & 15);
+		if (r & 0x10)
+			rl += 45;
+		rr = rl;
+		r = l;
+		break;
+
+	case MT_5MUTE:
+	default:
+		rl = 100 - 3 * (l & 31);
+		rr = 100 - 3 * (r & 31);
+		break;
+				
+	case MT_6MUTE:
+		rl = 100 - 3 * (l & 63) / 2;
+		rr = 100 - 3 * (r & 63) / 2;
+		break;
+	}
+	if (l & 0x80)
+		rl = 0;
+	if (r & 0x80)
+		rr = 0;
+	return put_user((rr << 8) | rl, arg);
+}
+
+#else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
+
+static const unsigned char volidx[SOUND_MIXER_NRDEVICES] = 
+{
+	[SOUND_MIXER_RECLEV] = 1,
+	[SOUND_MIXER_LINE1]  = 2,
+	[SOUND_MIXER_CD]     = 3,
+	[SOUND_MIXER_LINE]   = 4,
+	[SOUND_MIXER_MIC]    = 5,
+	[SOUND_MIXER_SYNTH]  = 6,
+	[SOUND_MIXER_LINE2]  = 7,
+	[SOUND_MIXER_VOLUME] = 8,
+	[SOUND_MIXER_PCM]    = 9
+};
+
+#endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
+
+static unsigned mixer_recmask(struct sv_state *s)
+{
+	unsigned long flags;
+	int i, j;
+
+	spin_lock_irqsave(&s->lock, flags);
+	j = rdindir(s, SV_CIMIX_ADCINL) >> 5;
+	spin_unlock_irqrestore(&s->lock, flags);
+	j &= 7;
+	for (i = 0; i < SOUND_MIXER_NRDEVICES && mixtable[i].rec != j; i++);
+	return 1 << i;
+}
+
+static int mixer_ioctl(struct sv_state *s, unsigned int cmd, unsigned long arg)
+{
+	unsigned long flags;
+	int i, val;
+	unsigned char l, r, rl, rr;
+	int __user *p = (int __user *)arg;
+
+	VALIDATE_STATE(s);
+        if (cmd == SOUND_MIXER_INFO) {
+		mixer_info info;
+		memset(&info, 0, sizeof(info));
+		strlcpy(info.id, "SonicVibes", sizeof(info.id));
+		strlcpy(info.name, "S3 SonicVibes", sizeof(info.name));
+		info.modify_counter = s->mix.modcnt;
+		if (copy_to_user((void __user *)arg, &info, sizeof(info)))
+			return -EFAULT;
+		return 0;
+	}
+	if (cmd == SOUND_OLD_MIXER_INFO) {
+		_old_mixer_info info;
+		memset(&info, 0, sizeof(info));
+		strlcpy(info.id, "SonicVibes", sizeof(info.id));
+		strlcpy(info.name, "S3 SonicVibes", sizeof(info.name));
+		if (copy_to_user((void __user *)arg, &info, sizeof(info)))
+			return -EFAULT;
+		return 0;
+	}
+	if (cmd == OSS_GETVERSION)
+		return put_user(SOUND_VERSION, p);
+	if (cmd == SOUND_MIXER_PRIVATE1) {  /* SRS settings */
+		if (get_user(val, p))
+			return -EFAULT;
+		spin_lock_irqsave(&s->lock, flags);
+		if (val & 1) {
+			if (val & 2) {
+				l = 4 - ((val >> 2) & 7);
+				if (l & ~3)
+					l = 4;
+				r = 4 - ((val >> 5) & 7);
+