Linux-2.6.12-rc2v2.6.12-rc2

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!

1 files changed, 2059 insertions, 0 deletions

diff --git a/sound/oss/nec_vrc5477.c b/sound/oss/nec_vrc5477.c
new file mode 100644
index 00000000000..0481e5e54dd
--- /dev/null
+++ b/sound/oss/nec_vrc5477.c
@@ -0,0 +1,2059 @@
+/***********************************************************************
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * drivers/sound/nec_vrc5477.c
+ *     AC97 sound dirver for NEC Vrc5477 chip (an integrated, 
+ *     multi-function controller chip for MIPS CPUs)
+ *
+ * VRA support Copyright 2001 Bradley D. LaRonde <brad@ltc.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ ***********************************************************************
+ */
+
+/*
+ * This code is derived from ite8172.c, which is written by Steve Longerbeam.
+ *
+ * Features:
+ *   Currently we only support the following capabilities:
+ *	. mono output to PCM L/R (line out).
+ *	. stereo output to PCM L/R (line out).
+ *	. mono input from PCM L (line in).
+ *	. stereo output from PCM (line in).
+ *	. sampling rate at 48k or variable sampling rate 
+ *	. support /dev/dsp, /dev/mixer devices, standard OSS devices.
+ *	. only support 16-bit PCM format (hardware limit, no software
+ *	  translation) 
+ *	. support duplex, but no trigger or realtime.
+ *	
+ *   Specifically the following are not supported:
+ *	. app-set frag size.
+ *	. mmap'ed buffer access
+ */
+
+/* 
+ * Original comments from ite8172.c file.
+ */
+
+/*
+ *
+ * Notes:
+ *
+ *  1. Much of the OSS buffer allocation, ioctl's, and mmap'ing are
+ *     taken, slightly modified or not at all, from the ES1371 driver,
+ *     so refer to the credits in es1371.c for those. The rest of the
+ *     code (probe, open, read, write, the ISR, etc.) is new.
+ *  2. The following support is untested:
+ *      * Memory mapping the audio buffers, and the ioctl controls that go
+ *        with it.
+ *      * S/PDIF output.
+ *  3. The following is not supported:
+ *      * I2S input.
+ *      * legacy audio mode.
+ *  4. Support for volume button interrupts is implemented but doesn't
+ *     work yet.
+ *
+ *  Revision history
+ *    02.08.2001  0.1   Initial release
+ */
+
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/ioport.h>
+#include <linux/sched.h>
+#include <linux/delay.h>
+#include <linux/sound.h>
+#include <linux/slab.h>
+#include <linux/soundcard.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/poll.h>
+#include <linux/bitops.h>
+#include <linux/proc_fs.h>
+#include <linux/spinlock.h>
+#include <linux/smp_lock.h>
+#include <linux/ac97_codec.h>
+#include <asm/io.h>
+#include <asm/dma.h>
+#include <asm/uaccess.h>
+
+/* -------------------debug macros -------------------------------------- */
+/* #undef VRC5477_AC97_DEBUG */
+#define VRC5477_AC97_DEBUG
+
+#undef VRC5477_AC97_VERBOSE_DEBUG
+/* #define VRC5477_AC97_VERBOSE_DEBUG */
+
+#if defined(VRC5477_AC97_VERBOSE_DEBUG)
+#define VRC5477_AC97_DEBUG
+#endif
+
+#if defined(VRC5477_AC97_DEBUG)
+#define ASSERT(x)  if (!(x)) { \
+	panic("assertion failed at %s:%d: %s\n", __FILE__, __LINE__, #x); }
+#else
+#define	ASSERT(x)
+#endif /* VRC5477_AC97_DEBUG */
+
+#if defined(VRC5477_AC97_VERBOSE_DEBUG)
+static u16 inTicket; 		/* check sync between intr & write */
+static u16 outTicket;
+#endif
+
+/* --------------------------------------------------------------------- */
+
+#undef OSS_DOCUMENTED_MIXER_SEMANTICS
+
+static const unsigned sample_shift[] = { 0, 1, 1, 2 };
+
+#define         VRC5477_INT_CLR         0x0
+#define         VRC5477_INT_STATUS	0x0
+#define         VRC5477_CODEC_WR        0x4
+#define         VRC5477_CODEC_RD        0x8
+#define         VRC5477_CTRL            0x18
+#define         VRC5477_ACLINK_CTRL     0x1c
+#define         VRC5477_INT_MASK        0x24
+
+#define		VRC5477_DAC1_CTRL	0x30
+#define		VRC5477_DAC1L		0x34
+#define		VRC5477_DAC1_BADDR	0x38
+#define		VRC5477_DAC2_CTRL	0x3c
+#define		VRC5477_DAC2L		0x40
+#define		VRC5477_DAC2_BADDR	0x44
+#define		VRC5477_DAC3_CTRL	0x48
+#define		VRC5477_DAC3L		0x4c
+#define		VRC5477_DAC3_BADDR	0x50
+
+#define		VRC5477_ADC1_CTRL	0x54
+#define		VRC5477_ADC1L		0x58
+#define		VRC5477_ADC1_BADDR	0x5c
+#define		VRC5477_ADC2_CTRL	0x60
+#define		VRC5477_ADC2L		0x64
+#define		VRC5477_ADC2_BADDR	0x68
+#define		VRC5477_ADC3_CTRL	0x6c
+#define		VRC5477_ADC3L		0x70
+#define		VRC5477_ADC3_BADDR	0x74
+
+#define		VRC5477_CODEC_WR_RWC	(1 << 23)
+
+#define		VRC5477_CODEC_RD_RRDYA	(1 << 31)
+#define		VRC5477_CODEC_RD_RRDYD	(1 << 30)
+
+#define		VRC5477_ACLINK_CTRL_RST_ON	(1 << 15)
+#define		VRC5477_ACLINK_CTRL_RST_TIME	0x7f
+#define		VRC5477_ACLINK_CTRL_SYNC_ON	(1 << 30)
+#define		VRC5477_ACLINK_CTRL_CK_STOP_ON	(1 << 31)
+
+#define		VRC5477_CTRL_DAC2ENB		(1 << 15) 
+#define		VRC5477_CTRL_ADC2ENB		(1 << 14) 
+#define		VRC5477_CTRL_DAC1ENB		(1 << 13) 
+#define		VRC5477_CTRL_ADC1ENB		(1 << 12) 
+
+#define		VRC5477_INT_MASK_NMASK		(1 << 31) 
+#define		VRC5477_INT_MASK_DAC1END	(1 << 5) 
+#define		VRC5477_INT_MASK_DAC2END	(1 << 4) 
+#define		VRC5477_INT_MASK_DAC3END	(1 << 3) 
+#define		VRC5477_INT_MASK_ADC1END	(1 << 2) 
+#define		VRC5477_INT_MASK_ADC2END	(1 << 1) 
+#define		VRC5477_INT_MASK_ADC3END	(1 << 0) 
+
+#define		VRC5477_DMA_ACTIVATION		(1 << 31)
+#define		VRC5477_DMA_WIP			(1 << 30)
+
+
+#define VRC5477_AC97_MODULE_NAME "NEC_Vrc5477_audio"
+#define PFX VRC5477_AC97_MODULE_NAME ": "
+
+/* --------------------------------------------------------------------- */
+
+struct vrc5477_ac97_state {
+	/* list of vrc5477_ac97 devices */
+	struct list_head devs;
+
+	/* the corresponding pci_dev structure */
+	struct pci_dev *dev;
+
+	/* soundcore stuff */
+	int dev_audio;
+
+	/* hardware resources */
+	unsigned long io;
+	unsigned int irq;
+
+#ifdef VRC5477_AC97_DEBUG
+	/* debug /proc entry */
+	struct proc_dir_entry *ps;
+	struct proc_dir_entry *ac97_ps;
+#endif /* VRC5477_AC97_DEBUG */
+
+	struct ac97_codec *codec;
+
+	unsigned dacChannels, adcChannels;
+	unsigned short dacRate, adcRate;
+	unsigned short extended_status;
+
+	spinlock_t lock;
+	struct semaphore open_sem;
+	mode_t open_mode;
+	wait_queue_head_t open_wait;
+
+	struct dmabuf {
+		void *lbuf, *rbuf;
+		dma_addr_t lbufDma, rbufDma;
+		unsigned bufOrder;
+		unsigned numFrag;
+		unsigned fragShift;
+		unsigned fragSize;	/* redundant */
+		unsigned fragTotalSize;	/* = numFrag * fragSize(real)  */
+		unsigned nextIn;
+		unsigned nextOut;
+		int count;
+		unsigned error; /* over/underrun */
+		wait_queue_head_t wait;
+		/* OSS stuff */
+		unsigned stopped:1;
+		unsigned ready:1;
+	} dma_dac, dma_adc;
+
+	#define	WORK_BUF_SIZE	2048
+	struct {
+		u16 lchannel;
+		u16 rchannel;
+	} workBuf[WORK_BUF_SIZE/4];
+};
+
+/* --------------------------------------------------------------------- */
+
+static LIST_HEAD(devs);
+
+/* --------------------------------------------------------------------- */
+
+static inline unsigned ld2(unsigned int x)
+{
+    unsigned r = 0;
+	
+    if (x >= 0x10000) {
+	x >>= 16;
+	r += 16;
+    }
+    if (x >= 0x100) {
+	x >>= 8;
+	r += 8;
+    }
+    if (x >= 0x10) {
+	x >>= 4;
+	r += 4;
+    }
+    if (x >= 4) {
+	x >>= 2;
+	r += 2;
+    }
+    if (x >= 2)
+	r++;
+    return r;
+}
+
+/* --------------------------------------------------------------------- */
+
+static u16 rdcodec(struct ac97_codec *codec, u8 addr)
+{
+	struct vrc5477_ac97_state *s = 
+		(struct vrc5477_ac97_state *)codec->private_data;
+	unsigned long flags;
+	u32 result;
+
+	spin_lock_irqsave(&s->lock, flags);
+
+	/* wait until we can access codec registers */
+	while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
+
+	/* write the address and "read" command to codec */
+	addr = addr & 0x7f;
+	outl((addr << 16) | VRC5477_CODEC_WR_RWC, s->io + VRC5477_CODEC_WR);
+
+	/* get the return result */
+	udelay(100); /* workaround hardware bug */
+	while ( (result = inl(s->io + VRC5477_CODEC_RD)) & 
+                (VRC5477_CODEC_RD_RRDYA | VRC5477_CODEC_RD_RRDYD) ) {
+		/* we get either addr or data, or both */
+		if (result & VRC5477_CODEC_RD_RRDYA) {
+			ASSERT(addr == ((result >> 16) & 0x7f) );
+		}
+		if (result & VRC5477_CODEC_RD_RRDYD) {
+			break;
+		}
+	}
+
+	spin_unlock_irqrestore(&s->lock, flags);
+
+	return result & 0xffff;
+}
+
+
+static void wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
+{
+	struct vrc5477_ac97_state *s = 
+		(struct vrc5477_ac97_state *)codec->private_data;
+	unsigned long flags;
+
+	spin_lock_irqsave(&s->lock, flags);
+
+	/* wait until we can access codec registers */
+	while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
+
+	/* write the address and value to codec */
+	outl((addr << 16) | data, s->io + VRC5477_CODEC_WR);
+
+	spin_unlock_irqrestore(&s->lock, flags);
+}
+
+
+static void waitcodec(struct ac97_codec *codec)
+{
+	struct vrc5477_ac97_state *s = 
+		(struct vrc5477_ac97_state *)codec->private_data;
+
+	/* wait until we can access codec registers */
+	while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
+}
+
+static int ac97_codec_not_present(struct ac97_codec *codec)
+{
+	struct vrc5477_ac97_state *s = 
+		(struct vrc5477_ac97_state *)codec->private_data;
+	unsigned long flags;
+	unsigned short count  = 0xffff; 
+
+	spin_lock_irqsave(&s->lock, flags);
+
+	/* wait until we can access codec registers */
+	do {
+	       if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
+		       break;
+	} while (--count);
+
+	if (count == 0) {
+		spin_unlock_irqrestore(&s->lock, flags);
+		return -1;
+	}
+
+	/* write 0 to reset */
+	outl((AC97_RESET << 16) | 0, s->io + VRC5477_CODEC_WR);
+
+	/* test whether we get a response from ac97 chip */
+	count  = 0xffff; 
+	do { 
+	       if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
+		       break;
+	} while (--count);
+
+	if (count == 0) {
+		spin_unlock_irqrestore(&s->lock, flags);
+		return -1;
+	}
+	spin_unlock_irqrestore(&s->lock, flags);
+	return 0;
+}
+
+/* --------------------------------------------------------------------- */
+
+static void vrc5477_ac97_delay(int msec)
+{
+	unsigned long tmo;
+	signed long tmo2;
+
+	if (in_interrupt())
+		return;
+    
+	tmo = jiffies + (msec*HZ)/1000;
+	for (;;) {
+		tmo2 = tmo - jiffies;
+		if (tmo2 <= 0)
+			break;
+		schedule_timeout(tmo2);
+	}
+}
+
+
+static void set_adc_rate(struct vrc5477_ac97_state *s, unsigned rate)
+{
+	wrcodec(s->codec, AC97_PCM_LR_ADC_RATE, rate);
+	s->adcRate = rate;
+}
+
+
+static void set_dac_rate(struct vrc5477_ac97_state *s, unsigned rate)
+{
+	if(s->extended_status & AC97_EXTSTAT_VRA) {
+	wrcodec(s->codec, AC97_PCM_FRONT_DAC_RATE, rate);
+		s->dacRate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE);
+	}
+}
+
+static int ac97_codec_not_present(struct ac97_codec *codec)
+{
+	struct vrc5477_ac97_state *s =
+		(struct vrc5477_ac97_state *)codec->private_data;
+	unsigned long flags;
+	unsigned short count  = 0xffff;
+
+	spin_lock_irqsave(&s->lock, flags);
+
+	/* wait until we can access codec registers */
+	do {
+	       if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
+		       break;
+	} while (--count);
+
+	if (count == 0) {
+		spin_unlock_irqrestore(&s->lock, flags);
+		return -1;
+	}
+
+	/* write 0 to reset */
+	outl((AC97_RESET << 16) | 0, s->io + VRC5477_CODEC_WR);
+
+	/* test whether we get a response from ac97 chip */
+	count  = 0xffff;
+	do {
+	       if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
+		       break;
+	} while (--count);
+
+	if (count == 0) {
+		spin_unlock_irqrestore(&s->lock, flags);
+		return -1;
+	}
+	spin_unlock_irqrestore(&s->lock, flags);
+	return 0;
+}
+
+/* --------------------------------------------------------------------- */
+
+extern inline void
+stop_dac(struct vrc5477_ac97_state *s)
+{
+	struct dmabuf* db = &s->dma_dac;
+	unsigned long flags;
+	u32 temp;
+    
+	spin_lock_irqsave(&s->lock, flags);
+
+	if (db->stopped) {
+		spin_unlock_irqrestore(&s->lock, flags);
+		return;
+	}
+
+	/* deactivate the dma */
+	outl(0, s->io + VRC5477_DAC1_CTRL);
+	outl(0, s->io + VRC5477_DAC2_CTRL);
+
+	/* wait for DAM completely stop */
+	while (inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
+	while (inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
+
+	/* disable dac slots in aclink */
+	temp = inl(s->io + VRC5477_CTRL);
+	temp &= ~ (VRC5477_CTRL_DAC1ENB | VRC5477_CTRL_DAC2ENB);
+	outl (temp, s->io + VRC5477_CTRL);
+
+	/* disable interrupts */
+	temp = inl(s->io + VRC5477_INT_MASK);
+	temp &= ~ (VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END); 
+	outl (temp, s->io + VRC5477_INT_MASK);
+
+	/* clear pending ones */
+	outl(VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END, 
+	     s->io +  VRC5477_INT_CLR);
+    
+	db->stopped = 1;
+    
+	spin_unlock_irqrestore(&s->lock, flags);
+}	
+
+static void start_dac(struct vrc5477_ac97_state *s)
+{
+	struct dmabuf* db = &s->dma_dac;
+	unsigned long flags;
+	u32 dmaLength;
+	u32 temp;
+
+	spin_lock_irqsave(&s->lock, flags);
+
+	if (!db->stopped) {
+		spin_unlock_irqrestore(&s->lock, flags);
+		return;
+	}
+
+	/* we should have some data to do the DMA trasnfer */
+	ASSERT(db->count >= db->fragSize);
+
+	/* clear pending fales interrupts */
+	outl(VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END, 
+	     s->io +  VRC5477_INT_CLR);
+
+	/* enable interrupts */
+	temp = inl(s->io + VRC5477_INT_MASK);
+	temp |= VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END;
+	outl(temp, s->io +  VRC5477_INT_MASK);
+
+	/* setup dma base addr */
+	outl(db->lbufDma + db->nextOut, s->io + VRC5477_DAC1_BADDR);
+	if (s->dacChannels == 1) {
+		outl(db->lbufDma + db->nextOut, s->io + VRC5477_DAC2_BADDR);
+	} else {
+		outl(db->rbufDma + db->nextOut, s->io + VRC5477_DAC2_BADDR);
+	}
+
+	/* set dma length, in the unit of 0x10 bytes */
+	dmaLength = db->fragSize >> 4;
+	outl(dmaLength, s->io + VRC5477_DAC1L);
+	outl(dmaLength, s->io + VRC5477_DAC2L);
+
+	/* activate dma */
+	outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_DAC1_CTRL);
+	outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_DAC2_CTRL);
+
+	/* enable dac slots - we should hear the music now! */
+	temp = inl(s->io + VRC5477_CTRL);
+	temp |= (VRC5477_CTRL_DAC1ENB | VRC5477_CTRL_DAC2ENB);
+	outl (temp, s->io + VRC5477_CTRL);
+
+	/* it is time to setup next dma transfer */
+	ASSERT(inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
+	ASSERT(inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
+
+	temp = db->nextOut + db->fragSize;
+	if (temp >= db->fragTotalSize) {
+		ASSERT(temp == db->fragTotalSize);
+		temp = 0;
+	}
+
+	outl(db->lbufDma + temp, s->io + VRC5477_DAC1_BADDR);
+	if (s->dacChannels == 1) {
+		outl(db->lbufDma + temp, s->io + VRC5477_DAC2_BADDR);
+	} else {
+		outl(db->rbufDma + temp, s->io + VRC5477_DAC2_BADDR);
+	}
+
+	db->stopped = 0;
+
+#if defined(VRC5477_AC97_VERBOSE_DEBUG)
+	outTicket = *(u16*)(db->lbuf+db->nextOut);
+	if (db->count > db->fragSize) {
+		ASSERT((u16)(outTicket+1) == *(u16*)(db->lbuf+temp));
+	}
+#endif
+
+	spin_unlock_irqrestore(&s->lock, flags);
+}	
+
+extern inline void stop_adc(struct vrc5477_ac97_state *s)
+{
+	struct dmabuf* db = &s->dma_adc;
+	unsigned long flags;
+	u32 temp;
+    
+	spin_lock_irqsave(&s->lock, flags);
+
+	if (db->stopped) {
+		spin_unlock_irqrestore(&s->lock, flags);
+		return;
+	}
+
+	/* deactivate the dma */
+	outl(0, s->io + VRC5477_ADC1_CTRL);
+	outl(0, s->io + VRC5477_ADC2_CTRL);
+
+	/* disable adc slots in aclink */
+	temp = inl(s->io + VRC5477_CTRL);
+	temp &= ~ (VRC5477_CTRL_ADC1ENB | VRC5477_CTRL_ADC2ENB);
+	outl (temp, s->io + VRC5477_CTRL);
+
+	/* disable interrupts */
+        temp = inl(s->io + VRC5477_INT_MASK);
+        temp &= ~ (VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END); 
+        outl (temp, s->io + VRC5477_INT_MASK);
+
+	/* clear pending ones */
+	outl(VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END, 
+	     s->io +  VRC5477_INT_CLR);
+    
+	db->stopped = 1;
+
+	spin_unlock_irqrestore(&s->lock, flags);
+}	
+
+static void start_adc(struct vrc5477_ac97_state *s)
+{
+	struct dmabuf* db = &s->dma_adc;
+	unsigned long flags;
+	u32 dmaLength;
+	u32 temp;
+
+	spin_lock_irqsave(&s->lock, flags);
+
+	if (!db->stopped) {
+		spin_unlock_irqrestore(&s->lock, flags);
+		return;
+	}
+
+	/* we should at least have some free space in the buffer */
+	ASSERT(db->count < db->fragTotalSize - db->fragSize * 2);
+
+	/* clear pending ones */
+	outl(VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END, 
+	     s->io +  VRC5477_INT_CLR);
+
+        /* enable interrupts */
+        temp = inl(s->io + VRC5477_INT_MASK);
+        temp |= VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END;
+        outl(temp, s->io +  VRC5477_INT_MASK);
+
+	/* setup dma base addr */
+	outl(db->lbufDma + db->nextIn, s->io + VRC5477_ADC1_BADDR);
+	outl(db->rbufDma + db->nextIn, s->io + VRC5477_ADC2_BADDR);
+
+	/* setup dma length */
+	dmaLength = db->fragSize >> 4;
+	outl(dmaLength, s->io + VRC5477_ADC1L);
+	outl(dmaLength, s->io + VRC5477_ADC2L);
+
+	/* activate dma */
+	outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_ADC1_CTRL);
+	outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_ADC2_CTRL);
+
+	/* enable adc slots */
+	temp = inl(s->io + VRC5477_CTRL);
+	temp |= (VRC5477_CTRL_ADC1ENB | VRC5477_CTRL_ADC2ENB);
+	outl (temp, s->io + VRC5477_CTRL);
+
+	/* it is time to setup next dma transfer */
+	temp = db->nextIn + db->fragSize;
+	if (temp >= db->fragTotalSize) {
+		ASSERT(temp == db->fragTotalSize);
+		temp = 0;
+	}
+	outl(db->lbufDma + temp, s->io + VRC5477_ADC1_BADDR);
+	outl(db->rbufDma + temp, s->io + VRC5477_ADC2_BADDR);
+
+	db->stopped = 0;
+
+	spin_unlock_irqrestore(&s->lock, flags);
+}	
+
+/* --------------------------------------------------------------------- */
+
+#define DMABUF_DEFAULTORDER (16-PAGE_SHIFT)
+#define DMABUF_MINORDER 1
+
+extern inline void dealloc_dmabuf(struct vrc5477_ac97_state *s,
+				  struct dmabuf *db)
+{
+	if (db->lbuf) {
+		ASSERT(db->rbuf);
+		pci_free_consistent(s->dev, PAGE_SIZE << db->bufOrder,
+				    db->lbuf, db->lbufDma);
+		pci_free_consistent(s->dev, PAGE_SIZE << db->bufOrder,
+				    db->rbuf, db->rbufDma);
+		db->lbuf = db->rbuf = NULL;
+	}
+	db->nextIn = db->nextOut = 0;
+	db->ready = 0;
+}
+
+static int prog_dmabuf(struct vrc5477_ac97_state *s, 
+		       struct dmabuf *db,
+		       unsigned rate)
+{
+	int order;
+	unsigned bufsize;
+
+	if (!db->lbuf) {
+		ASSERT(!db->rbuf);
+
+		db->ready = 0;
+		for (order = DMABUF_DEFAULTORDER; 
+		     order >= DMABUF_MINORDER; 
+		     order--) {
+			db->lbuf = pci_alloc_consistent(s->dev,
+							PAGE_SIZE << order,
+							&db->lbufDma);
+			db->rbuf = pci_alloc_consistent(s->dev,
+							PAGE_SIZE << order,
+							&db->rbufDma);
+			if (db->lbuf && db->rbuf) break;
+			if (db->lbuf) {
+			    ASSERT(!db->rbuf);
+			    pci_free_consistent(s->dev, 
+						PAGE_SIZE << order,
+						db->lbuf,
+						db->lbufDma);
+			}
+		}
+		if (!db->lbuf) {
+			ASSERT(!db->rbuf);
+			return -ENOMEM;
+		}
+
+		db->bufOrder = order;
+	}
+
+	db->count = 0;
+	db->nextIn = db->nextOut = 0;
+    
+	bufsize = PAGE_SIZE << db->bufOrder;
+	db->fragShift = ld2(rate * 2 / 100);
+	if (db->fragShift < 4) db->fragShift = 4;
+
+	db->numFrag = bufsize >> db->fragShift;
+	while (db->numFrag < 4 && db->fragShift > 4) {
+		db->fragShift--;
+		db->numFrag = bufsize >> db->fragShift;
+	}
+	db->fragSize = 1 << db->fragShift;
+	db->fragTotalSize = db->numFrag << db->fragShift;
+	memset(db->lbuf, 0, db->fragTotalSize);
+	memset(db->rbuf, 0, db->fragTotalSize);
+    
+	db->ready = 1;
+
+	return 0;
+}
+
+static inline int prog_dmabuf_adc(struct vrc5477_ac97_state *s)
+{
+    stop_adc(s);
+    return prog_dmabuf(s, &s->dma_adc, s->adcRate);
+}
+
+static inline int prog_dmabuf_dac(struct vrc5477_ac97_state *s)
+{
+    stop_dac(s);
+    return prog_dmabuf(s, &s->dma_dac, s->dacRate);
+}
+
+
+/* --------------------------------------------------------------------- */
+/* hold spinlock for the following! */
+
+static inline void vrc5477_ac97_adc_interrupt(struct vrc5477_ac97_state *s)
+{
+	struct dmabuf* adc = &s->dma_adc;
+	unsigned temp;
+
+	/* we need two frags avaiable because one is already being used
+	 * and the other will be used when next interrupt happens.
+	 */
+	if (adc->count >= adc->fragTotalSize - adc->fragSize) {
+		stop_adc(s);
+		adc->error++;
+		printk(KERN_INFO PFX "adc overrun\n");
+		return;
+	}
+
+	/* set the base addr for next DMA transfer */
+	temp = adc->nextIn + 2*adc->fragSize;
+	if (temp >= adc->fragTotalSize) {
+		ASSERT( (temp == adc->fragTotalSize) ||
+                             (temp == adc->fragTotalSize + adc->fragSize) );
+		temp -= adc->fragTotalSize;
+	}
+	outl(adc->lbufDma + temp, s->io + VRC5477_ADC1_BADDR);
+	outl(adc->rbufDma + temp, s->io + VRC5477_ADC2_BADDR);
+
+	/* adjust nextIn */
+	adc->nextIn += adc->fragSize;
+	if (adc->nextIn >= adc->fragTotalSize) {
+		ASSERT(adc->nextIn == adc->fragTotalSize);
+		adc->nextIn = 0;
+	}
+
+	/* adjust count */
+	adc->count += adc->fragSize;
+
+	/* wake up anybody listening */
+	if (waitqueue_active(&adc->wait)) {
+		wake_up_interruptible(&adc->wait);
+	}	
+}
+
+static inline void vrc5477_ac97_dac_interrupt(struct vrc5477_ac97_state *s)
+{
+	struct dmabuf* dac = &s->dma_dac;
+	unsigned temp;
+
+	/* next DMA transfer should already started */
+	// ASSERT(inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
+	// ASSERT(inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
+
+	/* let us set for next next DMA transfer */
+	temp = dac->nextOut + dac->fragSize*2;
+	if (temp >= dac->fragTotalSize) {
+		ASSERT( (temp == dac->fragTotalSize) || 
+                             (temp == dac->fragTotalSize + dac->fragSize) );
+		temp -= dac->fragTotalSize;
+	}
+	outl(dac->lbufDma + temp, s->io + VRC5477_DAC1_BADDR);
+	if (s->dacChannels == 1) {
+		outl(dac->lbufDma + temp, s->io + VRC5477_DAC2_BADDR);
+	} else {
+		outl(dac->rbufDma + temp, s->io + VRC5477_DAC2_BADDR);
+	}
+
+#if defined(VRC5477_AC97_VERBOSE_DEBUG)
+	if (*(u16*)(dac->lbuf +  dac->nextOut) != outTicket) {
+		printk("assert fail: - %d vs %d\n", 
+		        *(u16*)(dac->lbuf +  dac->nextOut),
+                        outTicket);
+                ASSERT(1 == 0);
+	}
+#endif
+
+	/* adjust nextOut pointer */
+	dac->nextOut += dac->fragSize;
+	if (dac->nextOut >= dac->fragTotalSize) {
+		ASSERT(dac->nextOut == dac->fragTotalSize);
+		dac->nextOut = 0;
+	}
+
+	/* adjust count */
+	dac->count -= dac->fragSize;
+	if (dac->count <=0 ) {
+		/* buffer under run */
+		dac->count = 0;
+		dac->nextIn = dac->nextOut;
+		stop_dac(s);
+	}
+
+#if defined(VRC5477_AC97_VERBOSE_DEBUG)
+	if (dac->count) {
+		outTicket ++;
+		ASSERT(*(u16*)(dac->lbuf +  dac->nextOut) == outTicket);
+	}
+#endif
+	
+	/* we cannot have both under run and someone is waiting on us */
+	ASSERT(! (waitqueue_active(&dac->wait) && (dac->count <= 0)) );
+
+	/* wake up anybody listening */
+	if (waitqueue_active(&dac->wait))
+		wake_up_interruptible(&dac->wait);
+}
+
+static irqreturn_t vrc5477_ac97_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+	struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)dev_id;
+	u32 irqStatus;
+	u32 adcInterrupts, dacInterrupts;
+
+	spin_lock(&s->lock);
+
+	/* get irqStatus and clear the detected ones */
+	irqStatus = inl(s->io + VRC5477_INT_STATUS);
+	outl(irqStatus, s->io + VRC5477_INT_CLR);
+
+	/* let us see what we get */
+	dacInterrupts = VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END;
+	adcInterrupts = VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END;
+	if (irqStatus & dacInterrupts) {
+		/* we should get both interrupts, but just in case ...  */
+		if (irqStatus & VRC5477_INT_MASK_DAC1END) {
+			vrc5477_ac97_dac_interrupt(s);
+		}
+		if ( (irqStatus & dacInterrupts) != dacInterrupts ) {
+			printk(KERN_WARNING "vrc5477_ac97 : dac interrupts not in sync!!!\n");
+			stop_dac(s);
+			start_dac(s);
+		}
+	} else if (irqStatus & adcInterrupts) {
+		/* we should get both interrupts, but just in case ...  */
+		if(irqStatus & VRC5477_INT_MASK_ADC1END) {
+			vrc5477_ac97_adc_interrupt(s);
+		} 
+		if ( (irqStatus & adcInterrupts) != adcInterrupts ) {
+			printk(KERN_WARNING "vrc5477_ac97 : adc interrupts not in sync!!!\n");
+			stop_adc(s);
+			start_adc(s);
+		}
+	}
+
+	spin_unlock(&s->lock);
+	return IRQ_HANDLED;
+}
+
+/* --------------------------------------------------------------------- */
+
+static int vrc5477_ac97_open_mixdev(struct inode *inode, struct file *file)
+{
+	int minor = iminor(inode);
+	struct list_head *list;
+	struct vrc5477_ac97_state *s;
+
+	for (list = devs.next; ; list = list->next) {
+		if (list == &devs)
+			return -ENODEV;
+		s = list_entry(list, struct vrc5477_ac97_state, devs);
+		if (s->codec->dev_mixer == minor)
+			break;
+	}
+	file->private_data = s;
+	return nonseekable_open(inode, file);
+}
+
+static int vrc5477_ac97_release_mixdev(struct inode *inode, struct file *file)
+{
+	return 0;
+}
+
+
+static int mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
+			unsigned long arg)
+{
+	return codec->mixer_ioctl(codec, cmd, arg);
+}
+
+static int vrc5477_ac97_ioctl_mixdev(struct inode *inode, struct file *file,
+				     unsigned int cmd, unsigned long arg)
+{
+    struct vrc5477_ac97_state *s = 
+	    (struct vrc5477_ac97_state *)file->private_data;
+    struct ac97_codec *codec = s->codec;
+
+    return mixdev_ioctl(codec, cmd, arg);
+}
+
+static /*const*/ struct file_operations vrc5477_ac97_mixer_fops = {
+	.owner		= THIS_MODULE,
+	.llseek		= no_llseek,
+	.ioctl		= vrc5477_ac97_ioctl_mixdev,
+	.open		= vrc5477_ac97_open_mixdev,
+	.release	= vrc5477_ac97_release_mixdev,
+};
+
+/* --------------------------------------------------------------------- */
+
+static int drain_dac(struct vrc5477_ac97_state *s, int nonblock)
+{
+	unsigned long flags;
+	int count, tmo;
+	
+	if (!s->dma_dac.ready)
+		return 0;
+
+	for (;;) {
+		spin_lock_irqsave(&s->lock, flags);
+		count = s->dma_dac.count;
+		spin_unlock_irqrestore(&s->lock, flags);
+		if (count <= 0)
+			break;
+		if (signal_pending(current))
+			break;
+		if (nonblock)
+			return -EBUSY;
+		tmo = 1000 * count / s->dacRate / 2;
+		vrc5477_ac97_delay(tmo);
+	}
+	if (signal_pending(current))
+		return -ERESTARTSYS;
+	return 0;
+}
+
+/* --------------------------------------------------------------------- */
+
+static inline int
+copy_two_channel_adc_to_user(struct vrc5477_ac97_state *s, 
+		             char *buffer, 
+			     int copyCount)
+{
+	struct dmabuf *db = &s->dma_adc;
+	int bufStart = db->nextOut;
+	for (; copyCount > 0; ) {
+		int i;
+		int count = copyCount;
+		if (count > WORK_BUF_SIZE/2) count = WORK_BUF_SIZE/2;
+		for (i=0; i< count/2; i++) {
+			s->workBuf[i].lchannel = 
+				*(u16*)(db->lbuf + bufStart + i*2);
+			s->workBuf[i].rchannel = 
+				*(u16*)(db->rbuf + bufStart + i*2);
+		}
+		if (copy_to_user(buffer, s->workBuf, count*2)) {
+			return -1;
+		}
+
+		copyCount -= count;
+		bufStart += count;
+		ASSERT(bufStart <= db->fragTotalSize);
+		buffer += count *2;
+	}
+	return 0;
+}
+
+/* return the total bytes that is copied */
+static inline int
+copy_adc_to_user(struct vrc5477_ac97_state *s,
+		 char * buffer,
+		 size_t count,
+		 int avail)
+{
+	struct dmabuf *db = &s->dma_adc;
+	int copyCount=0;
+	int copyFragCount=0;
+	int totalCopyCount = 0;
+	int totalCopyFragCount = 0;
+	unsigned long flags;
+
+	/* adjust count to signel channel byte count */
+	count >>= s->adcChannels - 1;
+
+	/* we may have to "copy" twice as ring buffer wraps around */
+	for (; (avail > 0) && (count > 0); ) {
+		/* determine max possible copy count for single channel */
+		copyCount = count;
+		if (copyCount > avail) {
+			copyCount = avail;
+		}
+		if (copyCount + db->nextOut > db->fragTotalSize) {
+			copyCount = db->fragTotalSize - db->nextOut;
+			ASSERT((copyCount % db->fragSize) == 0);
+		}
+
+		copyFragCount = (copyCount-1) >> db->fragShift;
+		copyFragCount = (copyFragCount+1) << db->fragShift;
+		ASSERT(copyFragCount >= copyCount);
+
+		/* we copy differently based on adc channels */
+		if (s->adcChannels == 1) {
+			if (copy_to_user(buffer, 
+					 db->lbuf + db->nextOut, 
+					 copyCount)) 
+				return -1;
+		} else {
+			/* *sigh* we have to mix two streams into one  */
+			if (copy_two_channel_adc_to_user(s, buffer, copyCount))
+				return -1;
+		}	
+
+		count -= copyCount;
+		totalCopyCount += copyCount;
+		avail -= copyFragCount;
+		totalCopyFragCount += copyFragCount;
+
+		buffer += copyCount << (s->adcChannels-1);
+
+		db->nextOut += copyFragCount;
+		if (db->nextOut >= db->fragTotalSize) {
+			ASSERT(db->nextOut == db->fragTotalSize);
+			db->nextOut = 0;
+		}
+
+		ASSERT((copyFragCount % db->fragSize) == 0);
+		ASSERT( (count == 0) || (copyCount == copyFragCount));
+	}
+
+	spin_lock_irqsave(&s->lock, flags);
+        db->count -= totalCopyFragCount;
+        spin_unlock_irqrestore(&s->lock, flags);
+
+	return totalCopyCount << (s->adcChannels-1);
+}
+
+static ssize_t 
+vrc5477_ac97_read(struct file *file, 
+		  char *buffer,
+		  size_t count, 
+		  loff_t *ppos)
+{
+	struct vrc5477_ac97_state *s = 
+		(struct vrc5477_ac97_state *)file->private_data;
+	struct dmabuf *db = &s->dma_adc;
+	ssize_t ret = 0;
+	unsigned long flags;
+	int copyCount;
+	size_t avail;
+
+	if (!access_ok(VERIFY_WRITE, buffer, count))
+		return -EFAULT;
+
+	ASSERT(db->ready);
+
+	while (count > 0) {
+		// wait for samples in capture buffer
+		do {
+			spin_lock_irqsave(&s->lock, flags);
+			if (db->stopped)
+				start_adc(s);
+			avail = db->count;
+			spin_unlock_irqrestore(&s->lock, flags);
+			if (avail <= 0) {
+				if (file->f_flags & O_NONBLOCK) {
+					if (!ret)
+						ret = -EAGAIN;
+					return ret;
+				}
+				interruptible_sleep_on(&db->wait);
+				if (signal_pending(current)) {
+					if (!ret)
+						ret = -ERESTARTSYS;
+					return ret;
+				}
+			}
+		} while (avail <= 0);
+
+		ASSERT( (avail % db->fragSize) == 0);
+		copyCount = copy_adc_to_user(s, buffer, count, avail);
+		if (copyCount <=0 ) {
+			if (!ret) ret = -EFAULT;
+			return ret;
+		}
+
+		count -= copyCount;
+		buffer += copyCount;
+		ret += copyCount;
+	} // while (count > 0)
+
+	return ret;
+}
+
+static inline int
+copy_two_channel_dac_from_user(struct vrc5477_ac97_state *s, 
+			       const char *buffer, 
+			       int copyCount)
+{
+	struct dmabuf *db = &s->dma_dac;
+	int bufStart = db->nextIn;
+
+	ASSERT(db->ready);
+
+        for (; copyCount > 0; ) {
+                int i;
+                int count = copyCount;
+                if (count > WORK_BUF_SIZE/2) count = WORK_BUF_SIZE/2;
+                if (copy_from_user(s->workBuf, buffer, count*2)) {
+                        return -1;
+                }
+                for (i=0; i< count/2; i++) {
+			*(u16*)(db->lbuf + bufStart + i*2) = 
+				s->workBuf[i].lchannel;
+			*(u16*)(db->rbuf + bufStart + i*2) = 
+				s->workBuf[i].rchannel;
+                }
+
+                copyCount -= count;
+		bufStart += count;
+		ASSERT(bufStart <= db->fragTotalSize);
+                buffer += count *2;
+        }
+        return 0;
+
+}
+
+/* return the total bytes that is copied */
+static inline int
+copy_dac_from_user(struct vrc5477_ac97_state *s, 
+		   const char *buffer,