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authorIshizaki Kou <kou.ishizaki@toshiba.co.jp>2008-04-11 12:32:30 +0900
committerJeff Garzik <jgarzik@redhat.com>2008-04-16 20:06:50 -0400
commit9a11fcb5215d6ecade9aca1f1fba272746a3882d (patch)
treeadf3d70d05fefb026557417b673a7fb0aac5b2a5 /net/rxrpc
parentfcfcfa205ef59f10d80e67a1762ad27e765d4868 (diff)
spidernet: fix error interrupt handling
In addition to the value of GHIINT0STS, spidernet interrupt handler should check the values of GHIINT1STS/GHIINT2STS registers at the beginning of spider_net_interrupt() so as not to drop error interrupts. GHIINT1STS/GHIINT2STS registers indicates some of erroneous conditions in spidernet, and a few bits of GHIINT0STS register reflects these conditions. But GHIINT0MSK masks these bits, so you should check these conditions by reading GHIINT1STS/GHIINT2STS registers directly. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Acked-by: Jens Osterkamp <jens@de.ibm.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'net/rxrpc')
0 files changed, 0 insertions, 0 deletions