diff options
| author | Lennert Buytenhek <buytenh@wantstofly.org> | 2008-05-10 21:05:31 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-05-17 22:55:14 +0100 |
| commit | b3a8b751c1c2997653c6bf2b5d10467c39f3cc6e (patch) | |
| tree | 3b41e1ba606f9f1fb1aa08d4c66b873c7443fb94 /mm/msync.c | |
| parent | db2c4392907524fa376ffbd04f5781d6394e2666 (diff) | |
[ARM] 5034/1: fix arm{925,926,940,946} dma_flush_range() in WT mode
The CPU's dma_flush_range() operation needs to clean+invalidate the
given memory area if the cache is in writeback mode, or do just the
invalidate part if the cache is in writethrough mode, but the current
proc-arm{925,926,940,946} (incorrectly) do a cache clean in the
latter case. This patch fixes that.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'mm/msync.c')
0 files changed, 0 insertions, 0 deletions