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| author | David S. Miller <davem@davemloft.net> | 2011-12-22 13:23:59 -0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2012-01-06 14:14:01 -0800 |
| commit | 747b409502fe765784cda1135d806042beddaa89 (patch) | |
| tree | 3318a10bc0876a40b107a63dffe0af95f8792b68 /lib/gen_crc32table.c | |
| parent | fca54d03a85e883b813255c63bbf11049d2eeb7a (diff) | |
sparc64: Fix MSIQ HV call ordering in pci_sun4v_msiq_build_irq().
[ Upstream commit 7cc8583372a21d98a23b703ad96cab03180b5030 ]
This silently was working for many years and stopped working on
Niagara-T3 machines.
We need to set the MSIQ to VALID before we can set it's state to IDLE.
On Niagara-T3, setting the state to IDLE first was causing HV_EINVAL
errors. The hypervisor documentation says, rather ambiguously, that
the MSIQ must be "initialized" before one can set the state.
I previously understood this to mean merely that a successful setconf()
operation has been performed on the MSIQ, which we have done at this
point. But it seems to also mean that it has been set VALID too.
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'lib/gen_crc32table.c')
0 files changed, 0 insertions, 0 deletions