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authorLinus Torvalds <torvalds@linux-foundation.org>2009-01-07 11:56:29 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2009-01-07 11:56:29 -0800
commit52fefcec97c25b15887e6a9a885ca54e7f7c0928 (patch)
tree4898112a7fb30c20a9da3aefe9fdc7fdebda57a6 /include
parenta0e280e0f33f6c859a235fb69a875ed8f3420388 (diff)
parent5fee325e7d2bcbebf1cb38b4ff3a7aa3744c43e3 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/czankel/xtensa-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/czankel/xtensa-2.6: xtensa: Update platform files to reflect new location of the header files. xtensa: switch to packed struct unaligned access implementation xtensa: Add xt2000 support files. xtensa: move headers files to arch/xtensa/include xtensa: use the new byteorder headers
Diffstat (limited to 'include')
-rw-r--r--include/asm-xtensa/Kbuild1
-rw-r--r--include/asm-xtensa/asmmacro.h153
-rw-r--r--include/asm-xtensa/atomic.h299
-rw-r--r--include/asm-xtensa/auxvec.h4
-rw-r--r--include/asm-xtensa/bitops.h132
-rw-r--r--include/asm-xtensa/bootparam.h61
-rw-r--r--include/asm-xtensa/bug.h18
-rw-r--r--include/asm-xtensa/bugs.h18
-rw-r--r--include/asm-xtensa/byteorder.h82
-rw-r--r--include/asm-xtensa/cache.h33
-rw-r--r--include/asm-xtensa/cacheasm.h177
-rw-r--r--include/asm-xtensa/cacheflush.h155
-rw-r--r--include/asm-xtensa/checksum.h250
-rw-r--r--include/asm-xtensa/coprocessor.h177
-rw-r--r--include/asm-xtensa/cpumask.h16
-rw-r--r--include/asm-xtensa/cputime.h6
-rw-r--r--include/asm-xtensa/current.h38
-rw-r--r--include/asm-xtensa/delay.h49
-rw-r--r--include/asm-xtensa/device.h7
-rw-r--r--include/asm-xtensa/div64.h16
-rw-r--r--include/asm-xtensa/dma-mapping.h179
-rw-r--r--include/asm-xtensa/dma.h61
-rw-r--r--include/asm-xtensa/elf.h205
-rw-r--r--include/asm-xtensa/emergency-restart.h6
-rw-r--r--include/asm-xtensa/errno.h16
-rw-r--r--include/asm-xtensa/fb.h12
-rw-r--r--include/asm-xtensa/fcntl.h1
-rw-r--r--include/asm-xtensa/futex.h1
-rw-r--r--include/asm-xtensa/hardirq.h28
-rw-r--r--include/asm-xtensa/highmem.h17
-rw-r--r--include/asm-xtensa/hw_irq.h14
-rw-r--r--include/asm-xtensa/io.h200
-rw-r--r--include/asm-xtensa/ioctl.h1
-rw-r--r--include/asm-xtensa/ioctls.h116
-rw-r--r--include/asm-xtensa/ipcbuf.h37
-rw-r--r--include/asm-xtensa/irq.h30
-rw-r--r--include/asm-xtensa/irq_regs.h1
-rw-r--r--include/asm-xtensa/kdebug.h1
-rw-r--r--include/asm-xtensa/kmap_types.h31
-rw-r--r--include/asm-xtensa/linkage.h16
-rw-r--r--include/asm-xtensa/local.h16
-rw-r--r--include/asm-xtensa/mman.h84
-rw-r--r--include/asm-xtensa/mmu.h17
-rw-r--r--include/asm-xtensa/mmu_context.h136
-rw-r--r--include/asm-xtensa/module.h27
-rw-r--r--include/asm-xtensa/msgbuf.h48
-rw-r--r--include/asm-xtensa/mutex.h9
-rw-r--r--include/asm-xtensa/page.h174
-rw-r--r--include/asm-xtensa/param.h34
-rw-r--r--include/asm-xtensa/pci-bridge.h88
-rw-r--r--include/asm-xtensa/pci.h82
-rw-r--r--include/asm-xtensa/percpu.h16
-rw-r--r--include/asm-xtensa/pgalloc.h73
-rw-r--r--include/asm-xtensa/pgtable.h416
-rw-r--r--include/asm-xtensa/platform-iss/hardware.h29
-rw-r--r--include/asm-xtensa/platform-iss/simcall.h62
-rw-r--r--include/asm-xtensa/platform.h91
-rw-r--r--include/asm-xtensa/poll.h20
-rw-r--r--include/asm-xtensa/posix_types.h122
-rw-r--r--include/asm-xtensa/processor.h193
-rw-r--r--include/asm-xtensa/ptrace.h135
-rw-r--r--include/asm-xtensa/regs.h145
-rw-r--r--include/asm-xtensa/resource.h16
-rw-r--r--include/asm-xtensa/rmap.h16
-rw-r--r--include/asm-xtensa/rwsem.h168
-rw-r--r--include/asm-xtensa/scatterlist.h39
-rw-r--r--include/asm-xtensa/sections.h16
-rw-r--r--include/asm-xtensa/segment.h16
-rw-r--r--include/asm-xtensa/sembuf.h44
-rw-r--r--include/asm-xtensa/serial.h18
-rw-r--r--include/asm-xtensa/setup.h16
-rw-r--r--include/asm-xtensa/shmbuf.h71
-rw-r--r--include/asm-xtensa/shmparam.h21
-rw-r--r--include/asm-xtensa/sigcontext.h28
-rw-r--r--include/asm-xtensa/siginfo.h16
-rw-r--r--include/asm-xtensa/signal.h172
-rw-r--r--include/asm-xtensa/smp.h27
-rw-r--r--include/asm-xtensa/socket.h68
-rw-r--r--include/asm-xtensa/sockios.h31
-rw-r--r--include/asm-xtensa/spinlock.h16
-rw-r--r--include/asm-xtensa/stat.h59
-rw-r--r--include/asm-xtensa/statfs.h17
-rw-r--r--include/asm-xtensa/string.h124
-rw-r--r--include/asm-xtensa/syscall.h42
-rw-r--r--include/asm-xtensa/system.h215
-rw-r--r--include/asm-xtensa/termbits.h219
-rw-r--r--include/asm-xtensa/termios.h105
-rw-r--r--include/asm-xtensa/thread_info.h164
-rw-r--r--include/asm-xtensa/timex.h96
-rw-r--r--include/asm-xtensa/tlb.h47
-rw-r--r--include/asm-xtensa/tlbflush.h191
-rw-r--r--include/asm-xtensa/topology.h16
-rw-r--r--include/asm-xtensa/types.h42
-rw-r--r--include/asm-xtensa/uaccess.h500
-rw-r--r--include/asm-xtensa/ucontext.h22
-rw-r--r--include/asm-xtensa/unaligned.h29
-rw-r--r--include/asm-xtensa/unistd.h735
-rw-r--r--include/asm-xtensa/user.h20
-rw-r--r--include/asm-xtensa/variant-dc232b/core.h424
-rw-r--r--include/asm-xtensa/variant-dc232b/tie-asm.h122
-rw-r--r--include/asm-xtensa/variant-dc232b/tie.h131
-rw-r--r--include/asm-xtensa/variant-fsf/core.h359
-rw-r--r--include/asm-xtensa/variant-fsf/tie-asm.h70
-rw-r--r--include/asm-xtensa/variant-fsf/tie.h77
-rw-r--r--include/asm-xtensa/vga.h19
-rw-r--r--include/asm-xtensa/xor.h16
106 files changed, 0 insertions, 9342 deletions
diff --git a/include/asm-xtensa/Kbuild b/include/asm-xtensa/Kbuild
deleted file mode 100644
index c68e1680da0..00000000000
--- a/include/asm-xtensa/Kbuild
+++ /dev/null
@@ -1 +0,0 @@
-include include/asm-generic/Kbuild.asm
diff --git a/include/asm-xtensa/asmmacro.h b/include/asm-xtensa/asmmacro.h
deleted file mode 100644
index 76915cabad1..00000000000
--- a/include/asm-xtensa/asmmacro.h
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * include/asm-xtensa/asmmacro.h
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2005 Tensilica Inc.
- */
-
-#ifndef _XTENSA_ASMMACRO_H
-#define _XTENSA_ASMMACRO_H
-
-#include <asm/variant/core.h>
-
-/*
- * Some little helpers for loops. Use zero-overhead-loops
- * where applicable and if supported by the processor.
- *
- * __loopi ar, at, size, inc
- * ar register initialized with the start address
- * at scratch register used by macro
- * size size immediate value
- * inc increment
- *
- * __loops ar, as, at, inc_log2[, mask_log2][, cond][, ncond]
- * ar register initialized with the start address
- * as register initialized with the size
- * at scratch register use by macro
- * inc_log2 increment [in log2]
- * mask_log2 mask [in log2]
- * cond true condition (used in loop'cond')
- * ncond false condition (used in b'ncond')
- *
- * __loop as
- * restart loop. 'as' register must not have been modified!
- *
- * __endla ar, at, incr
- * ar start address (modified)
- * as scratch register used by macro
- * inc increment
- */
-
-/*
- * loop for given size as immediate
- */
-
- .macro __loopi ar, at, size, incr
-
-#if XCHAL_HAVE_LOOPS
- movi \at, ((\size + \incr - 1) / (\incr))
- loop \at, 99f
-#else
- addi \at, \ar, \size
- 98:
-#endif
-
- .endm
-
-/*
- * loop for given size in register
- */
-
- .macro __loops ar, as, at, incr_log2, mask_log2, cond, ncond
-
-#if XCHAL_HAVE_LOOPS
- .ifgt \incr_log2 - 1
- addi \at, \as, (1 << \incr_log2) - 1
- .ifnc \mask_log2,
- extui \at, \at, \incr_log2, \mask_log2
- .else
- srli \at, \at, \incr_log2
- .endif
- .endif
- loop\cond \at, 99f
-#else
- .ifnc \mask_log2,
- extui \at, \as, \incr_log2, \mask_log2
- .else
- .ifnc \ncond,
- srli \at, \as, \incr_log2
- .endif
- .endif
- .ifnc \ncond,
- b\ncond \at, 99f
-
- .endif
- .ifnc \mask_log2,
- slli \at, \at, \incr_log2
- add \at, \ar, \at
- .else
- add \at, \ar, \as
- .endif
-#endif
- 98:
-
- .endm
-
-/*
- * loop from ar to ax
- */
-
- .macro __loopt ar, as, at, incr_log2
-
-#if XCHAL_HAVE_LOOPS
- sub \at, \as, \ar
- .ifgt \incr_log2 - 1
- addi \at, \at, (1 << \incr_log2) - 1
- srli \at, \at, \incr_log2
- .endif
- loop \at, 99f
-#else
- 98:
-#endif
-
- .endm
-
-/*
- * restart loop. registers must be unchanged
- */
-
- .macro __loop as
-
-#if XCHAL_HAVE_LOOPS
- loop \as, 99f
-#else
- 98:
-#endif
-
- .endm
-
-/*
- * end of loop with no increment of the address.
- */
-
- .macro __endl ar, as
-#if !XCHAL_HAVE_LOOPS
- bltu \ar, \as, 98b
-#endif
- 99:
- .endm
-
-/*
- * end of loop with increment of the address.
- */
-
- .macro __endla ar, as, incr
- addi \ar, \ar, \incr
- __endl \ar \as
- .endm
-
-
-#endif /* _XTENSA_ASMMACRO_H */
diff --git a/include/asm-xtensa/atomic.h b/include/asm-xtensa/atomic.h
deleted file mode 100644
index 67ad67bed8c..00000000000
--- a/include/asm-xtensa/atomic.h
+++ /dev/null
@@ -1,299 +0,0 @@
-/*
- * include/asm-xtensa/atomic.h
- *
- * Atomic operations that C can't guarantee us. Useful for resource counting..
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001 - 2005 Tensilica Inc.
- */
-
-#ifndef _XTENSA_ATOMIC_H
-#define _XTENSA_ATOMIC_H
-
-#include <linux/stringify.h>
-#include <linux/types.h>
-
-#ifdef __KERNEL__
-#include <asm/processor.h>
-#include <asm/system.h>
-
-#define ATOMIC_INIT(i) { (i) }
-
-/*
- * This Xtensa implementation assumes that the right mechanism
- * for exclusion is for locking interrupts to level 1.
- *
- * Locking interrupts looks like this:
- *
- * rsil a15, 1
- * <code>
- * wsr a15, PS
- * rsync
- *
- * Note that a15 is used here because the register allocation
- * done by the compiler is not guaranteed and a window overflow
- * may not occur between the rsil and wsr instructions. By using
- * a15 in the rsil, the machine is guaranteed to be in a state
- * where no register reference will cause an overflow.
- */
-
-/**
- * atomic_read - read atomic variable
- * @v: pointer of type atomic_t
- *
- * Atomically reads the value of @v.
- */
-#define atomic_read(v) ((v)->counter)
-
-/**
- * atomic_set - set atomic variable
- * @v: pointer of type atomic_t
- * @i: required value
- *
- * Atomically sets the value of @v to @i.
- */
-#define atomic_set(v,i) ((v)->counter = (i))
-
-/**
- * atomic_add - add integer to atomic variable
- * @i: integer value to add
- * @v: pointer of type atomic_t
- *
- * Atomically adds @i to @v.
- */
-static inline void atomic_add(int i, atomic_t * v)
-{
- unsigned int vval;
-
- __asm__ __volatile__(
- "rsil a15, "__stringify(LOCKLEVEL)"\n\t"
- "l32i %0, %2, 0 \n\t"
- "add %0, %0, %1 \n\t"
- "s32i %0, %2, 0 \n\t"
- "wsr a15, "__stringify(PS)" \n\t"
- "rsync \n"
- : "=&a" (vval)
- : "a" (i), "a" (v)
- : "a15", "memory"
- );
-}
-
-/**
- * atomic_sub - subtract the atomic variable
- * @i: integer value to subtract
- * @v: pointer of type atomic_t
- *
- * Atomically subtracts @i from @v.
- */
-static inline void atomic_sub(int i, atomic_t *v)
-{
- unsigned int vval;
-
- __asm__ __volatile__(
- "rsil a15, "__stringify(LOCKLEVEL)"\n\t"
- "l32i %0, %2, 0 \n\t"
- "sub %0, %0, %1 \n\t"
- "s32i %0, %2, 0 \n\t"
- "wsr a15, "__stringify(PS)" \n\t"
- "rsync \n"
- : "=&a" (vval)
- : "a" (i), "a" (v)
- : "a15", "memory"
- );
-}
-
-/*
- * We use atomic_{add|sub}_return to define other functions.
- */
-
-static inline int atomic_add_return(int i, atomic_t * v)
-{
- unsigned int vval;
-
- __asm__ __volatile__(
- "rsil a15,"__stringify(LOCKLEVEL)"\n\t"
- "l32i %0, %2, 0 \n\t"
- "add %0, %0, %1 \n\t"
- "s32i %0, %2, 0 \n\t"
- "wsr a15, "__stringify(PS)" \n\t"
- "rsync \n"
- : "=&a" (vval)
- : "a" (i), "a" (v)
- : "a15", "memory"
- );