diff options
| author | Bob Breuer <breuerr@mc.net> | 2006-03-23 22:36:19 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2006-03-23 22:36:19 -0800 |
| commit | a54123e27779049d27d21e6c8adfee73aa2c0734 (patch) | |
| tree | 265849e706e4ebe3b75127ebe6e3cbfe2a78850a /include | |
| parent | 674a396c6d2ba0341ebdd7c1c9950f32f018e2dd (diff) | |
[SPARC]: Try to start getting SMP back into shape.
Todo items:
- IRQ_INPROGRESS flag - use sparc64 irq buckets, or generic irq_desc?
- sun4d
- re-indent large chunks of sun4m_smp.c
- some places assume sequential cpu numbering (i.e. 0,1 instead of 0,2)
Last I checked (with 2.6.14), random programs segfault with dual
HyperSPARC. And with SuperSPARC II's, it seems stable but will
eventually die from a write lock error (wrong lock owner or something).
I haven't tried the HyperSPARC + highmem combination recently, so that
may still be a problem.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-sparc/cpudata.h | 1 | ||||
| -rw-r--r-- | include/asm-sparc/smp.h | 9 | ||||
| -rw-r--r-- | include/asm-sparc/spinlock.h | 25 |
3 files changed, 24 insertions, 11 deletions
diff --git a/include/asm-sparc/cpudata.h b/include/asm-sparc/cpudata.h index ec0d9ef90a3..a2c4d51d36c 100644 --- a/include/asm-sparc/cpudata.h +++ b/include/asm-sparc/cpudata.h @@ -18,6 +18,7 @@ typedef struct { unsigned int counter; int prom_node; int mid; + int next; } cpuinfo_sparc; DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data); diff --git a/include/asm-sparc/smp.h b/include/asm-sparc/smp.h index 580c51d011d..98c46e3fbe8 100644 --- a/include/asm-sparc/smp.h +++ b/include/asm-sparc/smp.h @@ -81,16 +81,9 @@ static inline int smp_call_function(void (*func)(void *info), void *info, int no return 0; } -extern __volatile__ int __cpu_number_map[NR_CPUS]; -extern __volatile__ int __cpu_logical_map[NR_CPUS]; - static inline int cpu_logical_map(int cpu) { - return __cpu_logical_map[cpu]; -} -static inline int cpu_number_map(int cpu) -{ - return __cpu_number_map[cpu]; + return cpu; } static inline int hard_smp4m_processor_id(void) diff --git a/include/asm-sparc/spinlock.h b/include/asm-sparc/spinlock.h index e344c98a6f5..3350c90c786 100644 --- a/include/asm-sparc/spinlock.h +++ b/include/asm-sparc/spinlock.h @@ -94,7 +94,7 @@ static inline void __read_lock(raw_rwlock_t *rw) #define __raw_read_lock(lock) \ do { unsigned long flags; \ local_irq_save(flags); \ - __raw_read_lock(lock); \ + __read_lock(lock); \ local_irq_restore(flags); \ } while(0) @@ -114,11 +114,11 @@ static inline void __read_unlock(raw_rwlock_t *rw) #define __raw_read_unlock(lock) \ do { unsigned long flags; \ local_irq_save(flags); \ - __raw_read_unlock(lock); \ + __read_unlock(lock); \ local_irq_restore(flags); \ } while(0) -extern __inline__ void __raw_write_lock(raw_rwlock_t *rw) +static inline void __raw_write_lock(raw_rwlock_t *rw) { register raw_rwlock_t *lp asm("g1"); lp = rw; @@ -131,9 +131,28 @@ extern __inline__ void __raw_write_lock(raw_rwlock_t *rw) : "g2", "g4", "memory", "cc"); } +static inline int __raw_write_trylock(raw_rwlock_t *rw) +{ + unsigned int val; + + __asm__ __volatile__("ldstub [%1 + 3], %0" + : "=r" (val) + : "r" (&rw->lock) + : "memory"); + + if (val == 0) { + val = rw->lock & ~0xff; + if (val) + ((volatile u8*)&rw->lock)[3] = 0; + } + + return (val == 0); +} + #define __raw_write_unlock(rw) do { (rw)->lock = 0; } while(0) #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) +#define __raw_read_trylock(lock) generic__raw_read_trylock(lock) #endif /* !(__ASSEMBLY__) */ |