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authorMark Rustad <mark.d.rustad@intel.com>2011-03-14 09:01:08 +0000
committerDavid S. Miller <davem@davemloft.net>2011-03-14 17:02:42 -0700
commit171f20e93b9d44a846bd5a41a583fdae13d26cd7 (patch)
tree2880d26b9b301e539c6571f42ebe9904e9dff8c7 /include
parent698e1d23cfc15312be2e7665014afd98c49ae9a1 (diff)
net: dcbnl: Fix misspellings
Fix a few spelling errors in dcbnl.h. Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
-rw-r--r--include/linux/dcbnl.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/linux/dcbnl.h b/include/linux/dcbnl.h
index 97c90b953c3..eedf79b7ef7 100644
--- a/include/linux/dcbnl.h
+++ b/include/linux/dcbnl.h
@@ -26,13 +26,13 @@
#define IEEE_8021QAZ_MAX_TCS 8
#define IEEE_8021QAZ_TSA_STRICT 0
-#define IEEE_8021QAZ_TSA_CB_SHABER 1
+#define IEEE_8021QAZ_TSA_CB_SHAPER 1
#define IEEE_8021QAZ_TSA_ETS 2
#define IEEE_8021QAZ_TSA_VENDOR 255
/* This structure contains the IEEE 802.1Qaz ETS managed object
*
- * @willing: willing bit in ETS configuratin TLV
+ * @willing: willing bit in ETS configuration TLV
* @ets_cap: indicates supported capacity of ets feature
* @cbs: credit based shaper ets algorithm supported
* @tc_tx_bw: tc tx bandwidth indexed by traffic class
@@ -92,7 +92,7 @@ struct ieee_pfc {
#define CEE_DCBX_MAX_PRIO 8
/**
- * struct cee_pg - CEE Prioity-Group managed object
+ * struct cee_pg - CEE Priority-Group managed object
*
* @willing: willing bit in the PG tlv
* @error: error bit in the PG tlv