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authorJani Nikula <jani.nikula@intel.com>2014-07-04 10:00:37 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-07-09 11:21:26 -0700
commit8143820319a5e7d617c122c70b58e1fdbd1b2c6e (patch)
tree1c82471c809fbf06906fd4ee344b38d1a10d009a /include
parent6fe5d7d9b99de2b295cfc81b91c5abd279b9be2e (diff)
drm/i915: provide interface for audio driver to query cdclk
commit c149dcb5c60bfea8871f16dfcc0690255eeb825f upstream. For Haswell and Broadwell, if the display power well has been disabled, the display audio controller divider values EM4 M VALUE and EM5 N VALUE will have been lost. The CDCLK frequency is required for reprogramming them to generate 24MHz HD-A link BCLK. So provide a private interface for the audio driver to query CDCLK. This is a stopgap solution until a more generic interface between audio and display drivers has been implemented. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Mengdong Lin <mengdong.lin@intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include')
-rw-r--r--include/drm/i915_powerwell.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/drm/i915_powerwell.h b/include/drm/i915_powerwell.h
index 2baba999609..baa6f11b183 100644
--- a/include/drm/i915_powerwell.h
+++ b/include/drm/i915_powerwell.h
@@ -32,5 +32,6 @@
/* For use by hda_i915 driver */
extern int i915_request_power_well(void);
extern int i915_release_power_well(void);
+extern int i915_get_cdclk_freq(void);
#endif /* _I915_POWERWELL_H_ */