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authorLinus Torvalds <torvalds@g5.osdl.org>2006-01-14 19:43:21 -0800
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-14 19:43:21 -0800
commit8d5c315059460e665c804d5a9b641f7f0a1e9dd7 (patch)
treeb9c598b2ac7a4fd7cf121ce733b98b0f18b8a1df /include
parenta9df3d0f312f4b1aefec76ae5ee86cccbf7cd4e0 (diff)
parent3f471126ee53feb5e9b210ea2f525ed3bb9b7a7f (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-ixp2000/ixp2000-regs.h10
-rw-r--r--include/asm-arm/arch-versatile/entry-macro.S1
-rw-r--r--include/asm-arm/arch-versatile/platform.h23
-rw-r--r--include/asm-arm/hardware/vic.h45
-rw-r--r--include/asm-arm/mach/arch.h2
-rw-r--r--include/asm-arm/page.h7
-rw-r--r--include/asm-arm/processor.h7
-rw-r--r--include/asm-arm/ptrace.h11
-rw-r--r--include/asm-arm/stat.h11
-rw-r--r--include/asm-arm/statfs.h38
-rw-r--r--include/asm-arm/unistd.h65
11 files changed, 155 insertions, 65 deletions
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index 8cf70ff160a..2b57f91b4eb 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -26,6 +26,8 @@
* fc000000 da000000 16M PCI CFG0
* fd000000 d8000000 16M PCI I/O
* fe[0-7]00000 8M per-platform mappings
+ * fe900000 80000000 1M SRAM #0 (first MB)
+ * fea00000 cb400000 1M SCRATCH ring get/put
* feb00000 c8000000 1M MSF
* fec00000 df000000 1M PCI CSRs
* fed00000 de000000 1M PCI CREG
@@ -91,6 +93,14 @@
#define IXP2000_MSF_VIRT_BASE 0xfeb00000
#define IXP2000_MSF_SIZE 0x00100000
+#define IXP2000_SCRATCH_RING_PHYS_BASE 0xcb400000
+#define IXP2000_SCRATCH_RING_VIRT_BASE 0xfea00000
+#define IXP2000_SCRATCH_RING_SIZE 0x00100000
+
+#define IXP2000_SRAM0_PHYS_BASE 0x80000000
+#define IXP2000_SRAM0_VIRT_BASE 0xfe900000
+#define IXP2000_SRAM0_SIZE 0x00100000
+
#define IXP2000_PCI_IO_PHYS_BASE 0xd8000000
#define IXP2000_PCI_IO_VIRT_BASE 0xfd000000
#define IXP2000_PCI_IO_SIZE 0x01000000
diff --git a/include/asm-arm/arch-versatile/entry-macro.S b/include/asm-arm/arch-versatile/entry-macro.S
index 58f0d71759f..feff771c0a0 100644
--- a/include/asm-arm/arch-versatile/entry-macro.S
+++ b/include/asm-arm/arch-versatile/entry-macro.S
@@ -8,6 +8,7 @@
* warranty of any kind, whether express or implied.
*/
#include <asm/hardware.h>
+#include <asm/hardware/vic.h>
.macro disable_fiq
.endm
diff --git a/include/asm-arm/arch-versatile/platform.h b/include/asm-arm/arch-versatile/platform.h
index cbdd9fb9633..72ef874567d 100644
--- a/include/asm-arm/arch-versatile/platform.h
+++ b/include/asm-arm/arch-versatile/platform.h
@@ -293,26 +293,7 @@
* VERSATILE_SYS_IC
*
*/
-#define VIC_IRQ_STATUS 0
-#define VIC_FIQ_STATUS 0x04
-#define VIC_IRQ_RAW_STATUS 0x08
-#define VIC_INT_SELECT 0x0C /* 1 = FIQ, 0 = IRQ */
-#define VIC_IRQ_ENABLE 0x10 /* 1 = enable, 0 = disable */
-#define VIC_IRQ_ENABLE_CLEAR 0x14
-#define VIC_IRQ_SOFT 0x18
-#define VIC_IRQ_SOFT_CLEAR 0x1C
-#define VIC_PROTECT 0x20
-#define VIC_VECT_ADDR 0x30
-#define VIC_DEF_VECT_ADDR 0x34
-#define VIC_VECT_ADDR0 0x100 /* 0 to 15 */
-#define VIC_VECT_CNTL0 0x200 /* 0 to 15 */
-#define VIC_ITCR 0x300 /* VIC test control register */
-
-#define VIC_FIQ_RAW_STATUS 0x08
-#define VIC_FIQ_ENABLE 0x10 /* 1 = enable, 0 = disable */
-#define VIC_FIQ_ENABLE_CLEAR 0x14
-#define VIC_FIQ_SOFT 0x18
-#define VIC_FIQ_SOFT_CLEAR 0x1C
+/* VIC definitions in include/asm-arm/hardware/vic.h */
#define SIC_IRQ_STATUS 0
#define SIC_IRQ_RAW_STATUS 0x04
@@ -325,8 +306,6 @@
#define SIC_INT_PIC_ENABLES 0x20 /* set interrupt pass through bits */
#define SIC_INT_PIC_ENABLEC 0x24 /* Clear interrupt pass through bits */
-#define VICVectCntl_Enable (1 << 5)
-
/* ------------------------------------------------------------------------
* Interrupts - bit assignment (primary)
* ------------------------------------------------------------------------
diff --git a/include/asm-arm/hardware/vic.h b/include/asm-arm/hardware/vic.h
new file mode 100644
index 00000000000..81825eb54c9
--- /dev/null
+++ b/include/asm-arm/hardware/vic.h
@@ -0,0 +1,45 @@
+/*
+ * linux/include/asm-arm/hardware/vic.h
+ *
+ * Copyright (c) ARM Limited 2003. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef __ASM_ARM_HARDWARE_VIC_H
+#define __ASM_ARM_HARDWARE_VIC_H
+
+#define VIC_IRQ_STATUS 0x00
+#define VIC_FIQ_STATUS 0x04
+#define VIC_RAW_STATUS 0x08
+#define VIC_INT_SELECT 0x0c /* 1 = FIQ, 0 = IRQ */
+#define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */
+#define VIC_INT_ENABLE_CLEAR 0x14
+#define VIC_INT_SOFT 0x18
+#define VIC_INT_SOFT_CLEAR 0x1c
+#define VIC_PROTECT 0x20
+#define VIC_VECT_ADDR 0x30
+#define VIC_DEF_VECT_ADDR 0x34
+
+#define VIC_VECT_ADDR0 0x100 /* 0 to 15 */
+#define VIC_VECT_CNTL0 0x200 /* 0 to 15 */
+#define VIC_ITCR 0x300 /* VIC test control register */
+
+#define VIC_VECT_CNTL_ENABLE (1 << 5)
+
+#ifndef __ASSEMBLY__
+void vic_init(void __iomem *base, u32 vic_sources);
+#endif
+
+#endif
diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h
index eb262e078c4..8222bf9fc36 100644
--- a/include/asm-arm/mach/arch.h
+++ b/include/asm-arm/mach/arch.h
@@ -20,7 +20,7 @@ struct machine_desc {
* by assembler code in head-armv.S
*/
unsigned int nr; /* architecture number */
- unsigned int phys_ram; /* start of physical ram */
+ unsigned int __deprecated phys_ram; /* start of physical ram */
unsigned int phys_io; /* start of physical io */
unsigned int io_pg_offst; /* byte offset for io
* page tabe entry */
diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h
index 4da1d532cbe..416320d9541 100644
--- a/include/asm-arm/page.h
+++ b/include/asm-arm/page.h
@@ -170,6 +170,13 @@ extern pmd_t *top_pmd;
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
+/*
+ * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
+ */
+#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
+#define ARCH_SLAB_MINALIGN 8
+#endif
+
#endif /* __KERNEL__ */
#include <asm-generic/page.h>
diff --git a/include/asm-arm/processor.h b/include/asm-arm/processor.h
index 31290694648..04f4d34c631 100644
--- a/include/asm-arm/processor.h
+++ b/include/asm-arm/processor.h
@@ -49,6 +49,12 @@ struct thread_struct {
#define INIT_THREAD { }
+#ifdef CONFIG_MMU
+#define nommu_start_thread(regs) do { } while (0)
+#else
+#define nommu_start_thread(regs) regs->ARM_r10 = current->mm->start_data
+#endif
+
#define start_thread(regs,pc,sp) \
({ \
unsigned long *stack = (unsigned long *)sp; \
@@ -65,6 +71,7 @@ struct thread_struct {
regs->ARM_r2 = stack[2]; /* r2 (envp) */ \
regs->ARM_r1 = stack[1]; /* r1 (argv) */ \
regs->ARM_r0 = stack[0]; /* r0 (argc) */ \
+ nommu_start_thread(regs); \
})
/* Forward declaration, a strange C thing */
diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h
index 4377e22b7e1..77adb7fa169 100644
--- a/include/asm-arm/ptrace.h
+++ b/include/asm-arm/ptrace.h
@@ -23,6 +23,9 @@
#define PTRACE_OLDSETOPTIONS 21
#define PTRACE_GET_THREAD_AREA 22
+
+#define PTRACE_SET_SYSCALL 23
+
/*
* PSR bits
*/
@@ -60,9 +63,11 @@
#ifndef __ASSEMBLY__
-/* this struct defines the way the registers are stored on the
- stack during a system call. */
-
+/*
+ * This struct defines the way the registers are stored on the
+ * stack during a system call. Note that sizeof(struct pt_regs)
+ * has to be a multiple of 8.
+ */
struct pt_regs {
long uregs[18];
};
diff --git a/include/asm-arm/stat.h b/include/asm-arm/stat.h
index ec4e2c2e3b4..42c0c13999d 100644
--- a/include/asm-arm/stat.h
+++ b/include/asm-arm/stat.h
@@ -70,14 +70,7 @@ struct stat64 {
long long st_size;
unsigned long st_blksize;
-
-#if defined(__ARMEB__)
- unsigned long __pad4; /* Future possible st_blocks hi bits */
- unsigned long st_blocks; /* Number 512-byte blocks allocated. */
-#else /* Must be little */
- unsigned long st_blocks; /* Number 512-byte blocks allocated. */
- unsigned long __pad4; /* Future possible st_blocks hi bits */
-#endif
+ unsigned long long st_blocks; /* Number 512-byte blocks allocated. */
unsigned long st_atime;
unsigned long st_atime_nsec;
@@ -89,6 +82,6 @@ struct stat64 {
unsigned long st_ctime_nsec;
unsigned long long st_ino;
-} __attribute__((packed));
+};
#endif
diff --git a/include/asm-arm/statfs.h b/include/asm-arm/statfs.h
index e81f82783b8..a02e6a8c3d7 100644
--- a/include/asm-arm/statfs.h
+++ b/include/asm-arm/statfs.h
@@ -1,6 +1,42 @@
#ifndef _ASMARM_STATFS_H
#define _ASMARM_STATFS_H
-#include <asm-generic/statfs.h>
+#ifndef __KERNEL_STRICT_NAMES
+# include <linux/types.h>
+typedef __kernel_fsid_t fsid_t;
+#endif
+
+struct statfs {
+ __u32 f_type;
+ __u32 f_bsize;
+ __u32 f_blocks;
+ __u32 f_bfree;
+ __u32 f_bavail;
+ __u32 f_files;
+ __u32 f_ffree;
+ __kernel_fsid_t f_fsid;
+ __u32 f_namelen;
+ __u32 f_frsize;
+ __u32 f_spare[5];
+};
+
+/*
+ * With EABI there is 4 bytes of padding added to this structure.
+ * Let's pack it so the padding goes away to simplify dual ABI support.
+ * Note that user space does NOT have to pack this structure.
+ */
+struct statfs64 {
+ __u32 f_type;
+ __u32 f_bsize;
+ __u64 f_blocks;
+ __u64 f_bfree;
+ __u64 f_bavail;
+ __u64 f_files;
+ __u64 f_ffree;
+ __kernel_fsid_t f_fsid;
+ __u32 f_namelen;
+ __u32 f_frsize;
+ __u32 f_spare[5];
+} __attribute__ ((packed,aligned(4)));
#endif
diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h
index d626e70fade..77430d6178a 100644
--- a/include/asm-arm/unistd.h
+++ b/include/asm-arm/unistd.h
@@ -15,10 +15,12 @@
#include <linux/linkage.h>
-#if defined(__thumb__)
+#define __NR_OABI_SYSCALL_BASE 0x900000
+
+#if defined(__thumb__) || defined(__ARM_EABI__)
#define __NR_SYSCALL_BASE 0
#else
-#define __NR_SYSCALL_BASE 0x900000
+#define __NR_SYSCALL_BASE __NR_OABI_SYSCALL_BASE
#endif
/*
@@ -373,13 +375,13 @@
#define __sys1(x) __sys2(x)
#ifndef __syscall
-#if defined(__thumb__)
-#define __syscall(name) \
- "push {r7}\n\t" \
- "mov r7, #" __sys1(__NR_##name) "\n\t" \
- "swi 0\n\t" \
- "pop {r7}"
+#if defined(__thumb__) || defined(__ARM_EABI__)
+#define __SYS_REG(name) register long __sysreg __asm__("r7") = __NR_##name;
+#define __SYS_REG_LIST(regs...) "r" (__sysreg) , ##regs
+#define __syscall(name) "swi\t0"
#else
+#define __SYS_REG(name)
+#define __SYS_REG_LIST(regs...) regs
#define __syscall(name) "swi\t" __sys1(__NR_##name) ""
#endif
#endif
@@ -395,33 +397,34 @@ do { \
#define _syscall0(type,name) \
type name(void) { \
+ __SYS_REG(name) \
register long __res_r0 __asm__("r0"); \
long __res; \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
- : \
- : "lr"); \
+ : __SYS_REG_LIST() ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
#define _syscall1(type,name,type1,arg1) \
type name(type1 arg1) { \
+ __SYS_REG(name) \
register long __r0 __asm__("r0") = (long)arg1; \
register long __res_r0 __asm__("r0"); \
long __res; \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
- : "r" (__r0) \
- : "lr"); \
+ : __SYS_REG_LIST( "0" (__r0) ) ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
#define _syscall2(type,name,type1,arg1,type2,arg2) \
type name(type1 arg1,type2 arg2) { \
+ __SYS_REG(name) \
register long __r0 __asm__("r0") = (long)arg1; \
register long __r1 __asm__("r1") = (long)arg2; \
register long __res_r0 __asm__("r0"); \
@@ -429,8 +432,7 @@ type name(type1 arg1,type2 arg2) { \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
- : "r" (__r0),"r" (__r1) \
- : "lr"); \
+ : __SYS_REG_LIST( "0" (__r0), "r" (__r1) ) ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
@@ -438,6 +440,7 @@ type name(type1 arg1,type2 arg2) { \
#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \
type name(type1 arg1,type2 arg2,type3 arg3) { \
+ __SYS_REG(name) \
register long __r0 __asm__("r0") = (long)arg1; \
register long __r1 __asm__("r1") = (long)arg2; \
register long __r2 __asm__("r2") = (long)arg3; \
@@ -446,8 +449,7 @@ type name(type1 arg1,type2 arg2,type3 arg3) { \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
- : "r" (__r0),"r" (__r1),"r" (__r2) \
- : "lr"); \
+ : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2) ) ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
@@ -455,6 +457,7 @@ type name(type1 arg1,type2 arg2,type3 arg3) { \
#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4)\
type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
+ __SYS_REG(name) \
register long __r0 __asm__("r0") = (long)arg1; \
register long __r1 __asm__("r1") = (long)arg2; \
register long __r2 __asm__("r2") = (long)arg3; \
@@ -464,8 +467,7 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
- : "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3) \
- : "lr"); \
+ : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) ) ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
@@ -473,6 +475,7 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) { \
+ __SYS_REG(name) \
register long __r0 __asm__("r0") = (long)arg1; \
register long __r1 __asm__("r1") = (long)arg2; \
register long __r2 __asm__("r2") = (long)arg3; \
@@ -483,14 +486,15 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) { \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
- : "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3),"r" (__r4) \
- : "lr"); \
+ : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \
+ "r" (__r3), "r" (__r4) ) ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \
type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) { \
+ __SYS_REG(name) \
register long __r0 __asm__("r0") = (long)arg1; \
register long __r1 __asm__("r1") = (long)arg2; \
register long __r2 __asm__("r2") = (long)arg3; \
@@ -502,30 +506,33 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
- : "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3), "r" (__r4),"r" (__r5) \
- : "lr"); \
+ : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \
+ "r" (__r3), "r" (__r4), "r" (__r5) ) ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
#ifdef __KERNEL__
#define __ARCH_WANT_IPC_PARSE_VERSION
-#define __ARCH_WANT_OLD_READDIR
#define __ARCH_WANT_STAT64
-#define __ARCH_WANT_SYS_ALARM
#define __ARCH_WANT_SYS_GETHOSTNAME
#define __ARCH_WANT_SYS_PAUSE
-#define __ARCH_WANT_SYS_TIME
-#define __ARCH_WANT_SYS_UTIME
-#define __ARCH_WANT_SYS_SOCKETCALL
#define __ARCH_WANT_SYS_GETPGRP
#define __ARCH_WANT_SYS_LLSEEK
#define __ARCH_WANT_SYS_NICE
-#define __ARCH_WANT_SYS_OLD_GETRLIMIT
-#define __ARCH_WANT_SYS_OLDUMOUNT
#define __ARCH_WANT_SYS_SIGPENDING
#define __ARCH_WANT_SYS_SIGPROCMASK
#define __ARCH_WANT_SYS_RT_SIGACTION
+
+#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
+#define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_SYS_OLDUMOUNT
+#define __ARCH_WANT_SYS_ALARM
+#define __ARCH_WANT_SYS_UTIME
+#define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_OLD_READDIR
+#define __ARCH_WANT_SYS_SOCKETCALL
+#endif
#endif
#ifdef __KERNEL_SYSCALLS__