diff options
author | Girish K S <girish.shivananjappa@linaro.org> | 2011-09-23 20:41:47 +0530 |
---|---|---|
committer | Chris Ball <cjb@laptop.org> | 2011-10-26 16:32:13 -0400 |
commit | b87d8dbf6c410b5f2d9b6893c85baa06aa131c7c (patch) | |
tree | f478e5378f259bb75158d5cb08cc459c93f30905 /include | |
parent | 199e3f4b419d045e64d5205a6354c5db04d98553 (diff) |
mmc: core: eMMC 4.5 Power Class Selection Feature
This patch adds the power class selection feature available for mmc
versions 4.0 and above. During the enumeration stage before switching
to the lower data bus, check if the power class is supported for the
current bus width. If the power class is available then switch to the
power class and use the higher data bus. If power class is not supported
then switch to the lower data bus in a worst case.
Signed-off-by: Girish K S <girish.shivananjappa@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/mmc/mmc.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h index ed8fca890ee..50af22730c7 100644 --- a/include/linux/mmc/mmc.h +++ b/include/linux/mmc/mmc.h @@ -279,10 +279,15 @@ struct _mmc_csd { #define EXT_CSD_ERASED_MEM_CONT 181 /* RO */ #define EXT_CSD_BUS_WIDTH 183 /* R/W */ #define EXT_CSD_HS_TIMING 185 /* R/W */ +#define EXT_CSD_POWER_CLASS 187 /* R/W */ #define EXT_CSD_REV 192 /* RO */ #define EXT_CSD_STRUCTURE 194 /* RO */ #define EXT_CSD_CARD_TYPE 196 /* RO */ #define EXT_CSD_PART_SWITCH_TIME 199 /* RO */ +#define EXT_CSD_PWR_CL_52_195 200 /* RO */ +#define EXT_CSD_PWR_CL_26_195 201 /* RO */ +#define EXT_CSD_PWR_CL_52_360 202 /* RO */ +#define EXT_CSD_PWR_CL_26_360 203 /* RO */ #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ #define EXT_CSD_S_A_TIMEOUT 217 /* RO */ #define EXT_CSD_REL_WR_SEC_C 222 /* RO */ @@ -294,6 +299,11 @@ struct _mmc_csd { #define EXT_CSD_SEC_ERASE_MULT 230 /* RO */ #define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */ #define EXT_CSD_TRIM_MULT 232 /* RO */ +#define EXT_CSD_PWR_CL_200_195 236 /* RO */ +#define EXT_CSD_PWR_CL_200_360 237 /* RO */ +#define EXT_CSD_PWR_CL_DDR_52_195 238 /* RO */ +#define EXT_CSD_PWR_CL_DDR_52_360 239 /* RO */ +#define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */ /* * EXT_CSD field definitions @@ -332,6 +342,10 @@ struct _mmc_csd { #define EXT_CSD_RST_N_EN_MASK 0x3 #define EXT_CSD_RST_N_ENABLED 1 /* RST_n is enabled on card */ +#define EXT_CSD_PWR_CL_8BIT_MASK 0xF0 /* 8 bit PWR CLS */ +#define EXT_CSD_PWR_CL_4BIT_MASK 0x0F /* 8 bit PWR CLS */ +#define EXT_CSD_PWR_CL_8BIT_SHIFT 4 +#define EXT_CSD_PWR_CL_4BIT_SHIFT 0 /* * MMC_SWITCH access modes */ |