diff options
| author | Chris Zankel <czankel@tensilica.com> | 2006-12-10 02:18:48 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-10 09:55:39 -0800 |
| commit | 173d6681380aa1d60dfc35ed7178bd7811ba2784 (patch) | |
| tree | 9d6d4d2c6dd791499ebab558647efb67ac88ae3a /include/asm-xtensa/timex.h | |
| parent | fd43fe19b830d6cd0eba08a6c6a5f71a6bd9c1b0 (diff) | |
[PATCH] xtensa: remove extra header files
The Xtensa port contained many header files that were never needed. This
rather lengthy patch removes all those files. Unfortunately, there were
many dependencies that needed to be updated, so this patch touches quite a
few source files.
Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-xtensa/timex.h')
| -rw-r--r-- | include/asm-xtensa/timex.h | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/include/asm-xtensa/timex.h b/include/asm-xtensa/timex.h index c7b705e6665..28c7985a400 100644 --- a/include/asm-xtensa/timex.h +++ b/include/asm-xtensa/timex.h @@ -16,17 +16,22 @@ #include <asm/processor.h> #include <linux/stringify.h> -#if XCHAL_INT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1 +#define _INTLEVEL(x) XCHAL_INT ## x ## _LEVEL +#define INTLEVEL(x) _INTLEVEL(x) + +#if INTLEVEL(XCHAL_TIMER0_INTERRUPT) == 1 # define LINUX_TIMER 0 -#elif XCHAL_INT_LEVEL(XCHAL_TIMER1_INTERRUPT) == 1 +# define LINUX_TIMER_INT XCHAL_TIMER0_INTERRUPT +#elif INTLEVEL(XCHAL_TIMER1_INTERRUPT) == 1 # define LINUX_TIMER 1 -#elif XCHAL_INT_LEVEL(XCHAL_TIMER2_INTERRUPT) == 1 +# define LINUX_TIMER_INT XCHAL_TIMER1_INTERRUPT +#elif INTLEVEL(XCHAL_TIMER2_INTERRUPT) == 1 # define LINUX_TIMER 2 +# define LINUX_TIMER_INT XCHAL_TIMER2_INTERRUPT #else # error "Bad timer number for Linux configurations!" #endif -#define LINUX_TIMER_INT XCHAL_TIMER_INTERRUPT(LINUX_TIMER) #define LINUX_TIMER_MASK (1L << LINUX_TIMER_INT) #define CLOCK_TICK_RATE 1193180 /* (everyone is using this value) */ @@ -60,8 +65,8 @@ extern cycles_t cacheflush_time; #define WSR_CCOUNT(r) __asm__("wsr %0,"__stringify(CCOUNT) :: "a" (r)) #define RSR_CCOUNT(r) __asm__("rsr %0,"__stringify(CCOUNT) : "=a" (r)) -#define WSR_CCOMPARE(x,r) __asm__("wsr %0,"__stringify(CCOMPARE_0)"+"__stringify(x) :: "a"(r)) -#define RSR_CCOMPARE(x,r) __asm__("rsr %0,"__stringify(CCOMPARE_0)"+"__stringify(x) : "=a"(r)) +#define WSR_CCOMPARE(x,r) __asm__("wsr %0,"__stringify(CCOMPARE)"+"__stringify(x) :: "a"(r)) +#define RSR_CCOMPARE(x,r) __asm__("rsr %0,"__stringify(CCOMPARE)"+"__stringify(x) : "=a"(r)) static inline unsigned long get_ccount (void) { |