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authorDmitry Torokhov <dtor_core@ameritech.net>2005-09-09 20:14:47 -0500
committerDmitry Torokhov <dtor_core@ameritech.net>2005-09-09 20:14:47 -0500
commitd344c5e0856ad03278d8700b503762dbc8b86e12 (patch)
treea6d893a643470a3c2580a58f3228a55fa1fd1d82 /include/asm-ppc64/elf.h
parent010988e888a0abbe7118635c1b33d049caae6b29 (diff)
parent87fc767b832ef5a681a0ff9d203c3289bc3be2bf (diff)
Manual merge with Linus
Diffstat (limited to 'include/asm-ppc64/elf.h')
-rw-r--r--include/asm-ppc64/elf.h16
1 files changed, 1 insertions, 15 deletions
diff --git a/include/asm-ppc64/elf.h b/include/asm-ppc64/elf.h
index 085eedb956f..c919a89343d 100644
--- a/include/asm-ppc64/elf.h
+++ b/include/asm-ppc64/elf.h
@@ -4,6 +4,7 @@
#include <asm/types.h>
#include <asm/ptrace.h>
#include <asm/cputable.h>
+#include <asm/auxvec.h>
/* PowerPC relocations defined by the ABIs */
#define R_PPC_NONE 0
@@ -237,21 +238,6 @@ do { \
#endif
-/*
- * We need to put in some extra aux table entries to tell glibc what
- * the cache block size is, so it can use the dcbz instruction safely.
- */
-#define AT_DCACHEBSIZE 19
-#define AT_ICACHEBSIZE 20
-#define AT_UCACHEBSIZE 21
-/* A special ignored type value for PPC, for glibc compatibility. */
-#define AT_IGNOREPPC 22
-
-/* The vDSO location. We have to use the same value as x86 for glibc's
- * sake :-)
- */
-#define AT_SYSINFO_EHDR 33
-
extern int dcache_bsize;
extern int icache_bsize;
extern int ucache_bsize;