diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-22 12:48:03 -0700 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-22 12:48:03 -0700 |
commit | 14d1adfc59ba66932ef167fdff62983e7c2b0197 (patch) | |
tree | 34bad21bf4ec220be87fa5d79ff41dd98e7dad9f /include/asm-powerpc/iseries/it_lp_naca.h | |
parent | e478bec0ba0a83a48a0f6982934b6de079e7e6b3 (diff) | |
parent | 69917c26c840e7de94522bf90fb190de63bf92bd (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (114 commits)
[POWERPC] Fix ohare IDE irq workaround on old powermacs
[POWERPC] EEH: Power4 systems sometimes need multiple resets.
[POWERPC] Include <asm/mmu.h> in arch/powerpc/sysdev/fsl_soc.h for phys_addr_t.
[POWERPC] Demacrofy arch/powerpc/platforms/maple/pci.c
[POWERPC] Maple U3 HT - reject inappropriate config space access
[POWERPC] Fix IPIC pending register assignments
[POWERPC] powerpc: fix building gdb against asm/ptrace.h
[POWERPC] Remove DISCONTIGMEM cruft from page.h
[POWERPC] Merge iSeries i/o operations with the rest
[POWERPC] 40x: Fix debug status register defines
[POWERPC] Fix compile error in sbc8560
[POWERPC] EEH: support MMIO enable recovery step
[POWERPC] EEH: enable MMIO/DMA on frozen slot
[POWERPC] EEH: code comment cleanup
[POWERPC] EEH: balance pcidev_get/put calls
[POWERPC] PPC: Fix xmon stack frame address in backtrace
[POWERPC] Add AT_PLATFORM value for Xilinx Virtex-4 FX
[POWERPC] Start arch/powerpc/boot code reorganization
[POWERPC] Define of_read_ulong helper
[POWERPC] iseries: eliminate a couple of warnings
...
Diffstat (limited to 'include/asm-powerpc/iseries/it_lp_naca.h')
-rw-r--r-- | include/asm-powerpc/iseries/it_lp_naca.h | 80 |
1 files changed, 0 insertions, 80 deletions
diff --git a/include/asm-powerpc/iseries/it_lp_naca.h b/include/asm-powerpc/iseries/it_lp_naca.h deleted file mode 100644 index 4fdcf052927..00000000000 --- a/include/asm-powerpc/iseries/it_lp_naca.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _ASM_POWERPC_ISERIES_IT_LP_NACA_H -#define _ASM_POWERPC_ISERIES_IT_LP_NACA_H - -#include <linux/types.h> - -/* - * This control block contains the data that is shared between the - * hypervisor (PLIC) and the OS. - */ - -struct ItLpNaca { -// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data - u32 xDesc; // Eye catcher x00-x03 - u16 xSize; // Size of this class x04-x05 - u16 xIntHdlrOffset; // Offset to IntHdlr array x06-x07 - u8 xMaxIntHdlrEntries; // Number of entries in array x08-x08 - u8 xPrimaryLpIndex; // LP Index of Primary x09-x09 - u8 xServiceLpIndex; // LP Ind of Service Focal Pointx0A-x0A - u8 xLpIndex; // LP Index x0B-x0B - u16 xMaxLpQueues; // Number of allocated queues x0C-x0D - u16 xLpQueueOffset; // Offset to start of LP queues x0E-x0F - u8 xPirEnvironMode; // Piranha or hardware x10-x10 - u8 xPirConsoleMode; // Piranha console indicator x11-x11 - u8 xPirDasdMode; // Piranha dasd indicator x12-x12 - u8 xRsvd1_0[5]; // Reserved for Piranha related x13-x17 - u8 flags; // flags, see below x18-x1F - u8 xSpVpdFormat; // VPD areas are in CSP format ... - u8 xIntProcRatio; // Ratio of int procs to procs ... - u8 xRsvd1_2[5]; // Reserved ... - u16 xRsvd1_3; // Reserved x20-x21 - u16 xPlicVrmIndex; // VRM index of PLIC x22-x23 - u16 xMinSupportedSlicVrmInd;// Min supported OS VRM index x24-x25 - u16 xMinCompatableSlicVrmInd;// Min compatible OS VRM index x26-x27 - u64 xLoadAreaAddr; // ER address of load area x28-x2F - u32 xLoadAreaChunks; // Chunks for the load area x30-x33 - u32 xPaseSysCallCRMask; // Mask used to test CR before x34-x37 - // doing an ASR switch on PASE - // system call. - u64 xSlicSegmentTablePtr; // Pointer to Slic seg table. x38-x3f - u8 xRsvd1_4[64]; // x40-x7F - -// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data - u8 xRsvd2_0[128]; // Reserved x00-x7F - -// CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators -// NB: Padding required to keep xInterrruptHdlr at x300 which is required -// for v4r4 PLIC. - u8 xOldLpQueue[128]; // LP Queue needed for v4r4 100-17F - u8 xRsvd3_0[384]; // Reserved 180-2FF - -// CACHE_LINE_7-8 0x0300 - 0x03FF Contains the address of the OS interrupt -// handlers - u64 xInterruptHdlr[32]; // Interrupt handlers 300-x3FF -}; - -extern struct ItLpNaca itLpNaca; - -#define ITLPNACA_LPAR 0x80 /* Is LPAR installed on the system */ -#define ITLPNACA_PARTITIONED 0x40 /* Is the system partitioned */ -#define ITLPNACA_HWSYNCEDTBS 0x20 /* Hardware synced TBs */ -#define ITLPNACA_HMTINT 0x10 /* Utilize MHT for interrupts */ - -#endif /* _ASM_POWERPC_ISERIES_IT_LP_NACA_H */ |