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authorRalf Baechle <ralf@linux-mips.org>2008-09-16 19:48:51 +0200
committerRalf Baechle <ralf@linux-mips.org>2008-10-11 16:18:52 +0100
commit384740dc49ea651ba350704d13ff6be9976e37fe (patch)
treea6e80cad287ccae7a86d81bfa692fc96889c88ed /include/asm-mips/mach-tx49xx
parente8c7c482347574ecdd45c43e32c332d5fc2ece61 (diff)
MIPS: Move headfiles to new location below arch/mips/include
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mach-tx49xx')
-rw-r--r--include/asm-mips/mach-tx49xx/cpu-feature-overrides.h23
-rw-r--r--include/asm-mips/mach-tx49xx/ioremap.h43
-rw-r--r--include/asm-mips/mach-tx49xx/kmalloc.h8
-rw-r--r--include/asm-mips/mach-tx49xx/war.h25
4 files changed, 0 insertions, 99 deletions
diff --git a/include/asm-mips/mach-tx49xx/cpu-feature-overrides.h b/include/asm-mips/mach-tx49xx/cpu-feature-overrides.h
deleted file mode 100644
index 275eaf92c74..00000000000
--- a/include/asm-mips/mach-tx49xx/cpu-feature-overrides.h
+++ /dev/null
@@ -1,23 +0,0 @@
-#ifndef __ASM_MACH_TX49XX_CPU_FEATURE_OVERRIDES_H
-#define __ASM_MACH_TX49XX_CPU_FEATURE_OVERRIDES_H
-
-#define cpu_has_llsc 1
-#define cpu_has_64bits 1
-#define cpu_has_inclusive_pcaches 0
-
-#define cpu_has_mips16 0
-#define cpu_has_mdmx 0
-#define cpu_has_mips3d 0
-#define cpu_has_smartmips 0
-#define cpu_has_vtag_icache 0
-#define cpu_has_ic_fills_f_dc 0
-#define cpu_has_dsp 0
-#define cpu_has_mipsmt 0
-#define cpu_has_userlocal 0
-
-#define cpu_has_mips32r1 0
-#define cpu_has_mips32r2 0
-#define cpu_has_mips64r1 0
-#define cpu_has_mips64r2 0
-
-#endif /* __ASM_MACH_TX49XX_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-tx49xx/ioremap.h b/include/asm-mips/mach-tx49xx/ioremap.h
deleted file mode 100644
index 1e7beae7222..00000000000
--- a/include/asm-mips/mach-tx49xx/ioremap.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * include/asm-mips/mach-tx49xx/ioremap.h
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef __ASM_MACH_TX49XX_IOREMAP_H
-#define __ASM_MACH_TX49XX_IOREMAP_H
-
-#include <linux/types.h>
-
-/*
- * Allow physical addresses to be fixed up to help peripherals located
- * outside the low 32-bit range -- generic pass-through version.
- */
-static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
-{
- return phys_addr;
-}
-
-static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size,
- unsigned long flags)
-{
-#ifdef CONFIG_64BIT
-#define TXX9_DIRECTMAP_BASE 0xfff000000ul
-#else
-#define TXX9_DIRECTMAP_BASE 0xff000000ul
-#endif
- if (offset >= TXX9_DIRECTMAP_BASE &&
- offset < TXX9_DIRECTMAP_BASE + 0x400000)
- return (void __iomem *)(unsigned long)(int)offset;
- return NULL;
-}
-
-static inline int plat_iounmap(const volatile void __iomem *addr)
-{
- return (unsigned long)addr >=
- (unsigned long)(int)(TXX9_DIRECTMAP_BASE & 0xffffffff);
-}
-
-#endif /* __ASM_MACH_TX49XX_IOREMAP_H */
diff --git a/include/asm-mips/mach-tx49xx/kmalloc.h b/include/asm-mips/mach-tx49xx/kmalloc.h
deleted file mode 100644
index 913ff196259..00000000000
--- a/include/asm-mips/mach-tx49xx/kmalloc.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef __ASM_MACH_TX49XX_KMALLOC_H
-#define __ASM_MACH_TX49XX_KMALLOC_H
-
-/*
- * All happy, no need to define ARCH_KMALLOC_MINALIGN
- */
-
-#endif /* __ASM_MACH_TX49XX_KMALLOC_H */
diff --git a/include/asm-mips/mach-tx49xx/war.h b/include/asm-mips/mach-tx49xx/war.h
deleted file mode 100644
index 39b5d1177c5..00000000000
--- a/include/asm-mips/mach-tx49xx/war.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
- */
-#ifndef __ASM_MIPS_MACH_TX49XX_WAR_H
-#define __ASM_MIPS_MACH_TX49XX_WAR_H
-
-#define R4600_V1_INDEX_ICACHEOP_WAR 0
-#define R4600_V1_HIT_CACHEOP_WAR 0
-#define R4600_V2_HIT_CACHEOP_WAR 0
-#define R5432_CP0_INTERRUPT_WAR 0
-#define BCM1250_M3_WAR 0
-#define SIBYTE_1956_WAR 0
-#define MIPS4K_ICACHE_REFILL_WAR 0
-#define MIPS_CACHE_SYNC_WAR 0
-#define TX49XX_ICACHE_INDEX_INV_WAR 1
-#define RM9000_CDEX_SMP_WAR 0
-#define ICACHE_REFILLS_WORKAROUND_WAR 0
-#define R10000_LLSC_WAR 0
-#define MIPS34K_MISSED_ITLB_WAR 0
-
-#endif /* __ASM_MIPS_MACH_TX49XX_WAR_H */