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authorDavid S. Miller <davem@davemloft.net>2008-09-08 16:59:05 -0700
committerDavid S. Miller <davem@davemloft.net>2008-09-08 16:59:05 -0700
commit17dce5dfe38ae2fb359b61e855f5d8a3a8b7892b (patch)
tree88bb1fcf84f9ebfa4299c9a8dcd9e6330b358446 /include/asm-blackfin/cache.h
parent712d6954e3998d0de2840d8130941e8042541246 (diff)
parent82a28c794f27aac17d7a3ebd7f14d731a11a5532 (diff)
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts: net/mac80211/mlme.c
Diffstat (limited to 'include/asm-blackfin/cache.h')
-rw-r--r--include/asm-blackfin/cache.h29
1 files changed, 0 insertions, 29 deletions
diff --git a/include/asm-blackfin/cache.h b/include/asm-blackfin/cache.h
deleted file mode 100644
index 023d72133b5..00000000000
--- a/include/asm-blackfin/cache.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * include/asm-blackfin/cache.h
- */
-#ifndef __ARCH_BLACKFIN_CACHE_H
-#define __ARCH_BLACKFIN_CACHE_H
-
-/*
- * Bytes per L1 cache line
- * Blackfin loads 32 bytes for cache
- */
-#define L1_CACHE_SHIFT 5
-#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
-#define SMP_CACHE_BYTES L1_CACHE_BYTES
-
-/*
- * Put cacheline_aliged data to L1 data memory
- */
-#ifdef CONFIG_CACHELINE_ALIGNED_L1
-#define __cacheline_aligned \
- __attribute__((__aligned__(L1_CACHE_BYTES), \
- __section__(".data_l1.cacheline_aligned")))
-#endif
-
-/*
- * largest L1 which this arch supports
- */
-#define L1_CACHE_SHIFT_MAX 5
-
-#endif