diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2007-10-18 23:39:14 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-19 11:53:34 -0700 |
| commit | 1c7037db50ebecf3d5cfbf7082daa5d97d900fef (patch) | |
| tree | 1843c417160b79c3f79a54d546ddcf5ccdb1b44b /include/asm-arm | |
| parent | 22124c9999f00340b062fff740db30187bf18454 (diff) | |
remove unused flush_tlb_pgtables
Nobody uses flush_tlb_pgtables anymore, this patch removes all remaining
traces of it from all archs.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-arm')
| -rw-r--r-- | include/asm-arm/tlbflush.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h index 71be4fded7e..8c6bc1bb9d1 100644 --- a/include/asm-arm/tlbflush.h +++ b/include/asm-arm/tlbflush.h @@ -463,11 +463,6 @@ extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); */ extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte); -/* - * ARM processors do not cache TLB tables in RAM. - */ -#define flush_tlb_pgtables(mm,start,end) do { } while (0) - #endif #endif /* CONFIG_MMU */ |