diff options
| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2012-08-08 14:15:30 -0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-08-09 18:41:25 +0200 |
| commit | 602c43d34dcd46b0349b31c9b53b19cd5063ae3f (patch) | |
| tree | 41d61c5a722099f327ad39dece9ba2c5df67ef4a /drivers | |
| parent | dfcef252e024b4ca6fe5be9e1d656ac1929ce894 (diff) | |
drm/i915: completely reset the value of DDI_FUNC_CTL
Don't rely on previous values already set on the register. Everything
we're not explicitly setting should be zero for now.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ddi.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 8b383593b0d..ff03a3a5719 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -723,12 +723,7 @@ void intel_ddi_mode_set(struct drm_encoder *encoder, } /* Enable PIPE_DDI_FUNC_CTL for the pipe to work in HDMI mode */ - temp = I915_READ(DDI_FUNC_CTL(pipe)); - temp &= ~PIPE_DDI_PORT_MASK; - temp &= ~PIPE_DDI_BPC_MASK; - temp &= ~PIPE_DDI_MODE_SELECT_MASK; - temp &= ~(PIPE_DDI_PVSYNC | PIPE_DDI_PHSYNC); - temp |= PIPE_DDI_FUNC_ENABLE | PIPE_DDI_SELECT_PORT(port); + temp = PIPE_DDI_FUNC_ENABLE | PIPE_DDI_SELECT_PORT(port); switch (intel_crtc->bpp) { case 18: |