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authorShannon Nelson <shannon.nelson@intel.com>2007-08-24 23:02:53 -0700
committerDavid S. Miller <davem@sunset.davemloft.net>2007-08-26 18:35:40 -0700
commite4223976341ffb22fabe5b3a69873966808c83aa (patch)
tree8375db74c6243e583eeaff91d5d50ca96632a55d /drivers
parent97a1ad431b89765755d2b5aa8c0777ed637d5c4a (diff)
[IOAT]: ioatdma needs to to play nice in a multi-dma-client world
Now that the DMA engine has a multi-client interface, fix the ioatdma driver to play along. At the same time, remove a couple of unnecessary reads and writes. Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/dma/ioatdma.c18
1 files changed, 4 insertions, 14 deletions
diff --git a/drivers/dma/ioatdma.c b/drivers/dma/ioatdma.c
index 2d1f17865b6..41b18c5a314 100644
--- a/drivers/dma/ioatdma.c
+++ b/drivers/dma/ioatdma.c
@@ -191,17 +191,12 @@ static int ioat_dma_alloc_chan_resources(struct dma_chan *chan)
int i;
LIST_HEAD(tmp_list);
- /*
- * In-use bit automatically set by reading chanctrl
- * If 0, we got it, if 1, someone else did
- */
- chanctrl = readw(ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
- if (chanctrl & IOAT_CHANCTRL_CHANNEL_IN_USE)
- return -EBUSY;
+ /* have we already been set up? */
+ if (!list_empty(&ioat_chan->free_desc))
+ return INITIAL_IOAT_DESC_COUNT;
/* Setup register to interrupt and write completion status on error */
- chanctrl = IOAT_CHANCTRL_CHANNEL_IN_USE |
- IOAT_CHANCTRL_ERR_INT_EN |
+ chanctrl = IOAT_CHANCTRL_ERR_INT_EN |
IOAT_CHANCTRL_ANY_ERR_ABORT_EN |
IOAT_CHANCTRL_ERR_COMPLETION_EN;
writew(chanctrl, ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
@@ -282,11 +277,6 @@ static void ioat_dma_free_chan_resources(struct dma_chan *chan)
in_use_descs - 1);
ioat_chan->last_completion = ioat_chan->completion_addr = 0;
-
- /* Tell hw the chan is free */
- chanctrl = readw(ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
- chanctrl &= ~IOAT_CHANCTRL_CHANNEL_IN_USE;
- writew(chanctrl, ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
}
static struct dma_async_tx_descriptor *