Merge tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC non-critical fixes from Olof Johansson:
 "As usual, we have a batch of fixes that weren't considered significant
  enough to warrant going into the later -rcs for previous release, so
  they are queued up on this branch.

  A handful of these are for various DT fixups for Samsung platforms,
  and a handful of other minor things.

  There are also a couple of stable-marked patches for mvebu -- they
  came in quite late and we decided to keep them deferred until the
  first -stable release to get more coverage instead of squeezing them
  into 3.13"

* tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (32 commits)
  ARM: at91: smc: bug fix in sam9_smc_cs_read()
  i2c: mv64xxx: Document the newly introduced Armada XP A0 compatible
  i2c: mv64xxx: Fix bus hang on A0 version of the Armada XP SoCs
  ARM: mvebu: Add quirk for i2c for the OpenBlocks AX3-4 board
  ARM: mvebu: Add support to get the ID and the revision of a SoC
  ARM: dts: msm: Fix gpio interrupt and reg length
  irqchip: sirf: set IRQ_LEVEL status_flags
  ARM: OMAP2+: gpmc: Move legacy GPMC width setting
  ARM: OMAP2+: gpmc: Introduce gpmc_set_legacy()
  ARM: OMAP2+: gpmc: Move initialization outside the gpmc_t condition
  ARM: OMAP2+: board-generic: update SoC compatibility strings
  Documentation: dt: OMAP: explicitly state SoC compatible strings
  ARM: OMAP2+: enable AM33xx SOC EVM audio
  ARM: OMAP2+: Select USB PHY for AM335x SoC
  ARM: bcm2835: Fix grammar in help message
  ARM: msm: trout: fix uninit var warning
  ARM: dts: Use MSHC controller for eMMC memory for exynos4412-trats2
  ARM: dts: Fix definition of MSHC device tree nodes for exynos4x12
  ARM: dts: add clock provider for mshc node for Exynos4412 SOC
  clk: samsung: exynos4: Fix definition of div_mmc_pre4 divider
  ...

3 files changed, 9 insertions, 2 deletions

diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index 1a7c1b929c6..3852e44db0f 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -530,7 +530,8 @@ static struct samsung_div_clock exynos4_div_clks[] __initdata = {
 	DIV(sclk_i2s1, "sclk_i2s1", "sclk_audio1", DIV_PERIL5, 0, 6),
 	DIV(sclk_i2s2, "sclk_i2s2", "sclk_audio2", DIV_PERIL5, 8, 6),
 	DIV(none, "div_mmc4", "mout_mmc4", DIV_FSYS3, 0, 4),
-	DIV(none, "div_mmc_pre4", "div_mmc4", DIV_FSYS3, 8, 8),
+	DIV_F(none, "div_mmc_pre4", "div_mmc4", DIV_FSYS3, 8, 8,
+			CLK_SET_RATE_PARENT, 0),
 	DIV(none, "div_uart0", "mout_uart0", DIV_PERIL0, 0, 4),
 	DIV(none, "div_uart1", "mout_uart1", DIV_PERIL0, 4, 4),
 	DIV(none, "div_uart2", "mout_uart2", DIV_PERIL0, 8, 4),
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index 8be7e42aa4d..b8c5187b9ee 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -692,6 +692,7 @@ static const struct of_device_id mv64xxx_i2c_of_match_table[] = {
 	{ .compatible = "allwinner,sun4i-i2c", .data = &mv64xxx_i2c_regs_sun4i},
 	{ .compatible = "marvell,mv64xxx-i2c", .data = &mv64xxx_i2c_regs_mv64xxx},
 	{ .compatible = "marvell,mv78230-i2c", .data = &mv64xxx_i2c_regs_mv64xxx},
+	{ .compatible = "marvell,mv78230-a0-i2c", .data = &mv64xxx_i2c_regs_mv64xxx},
 	{}
 };
 MODULE_DEVICE_TABLE(of, mv64xxx_i2c_of_match_table);
@@ -783,6 +784,10 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
 		drv_data->errata_delay = true;
 	}
 
+	if (of_device_is_compatible(np, "marvell,mv78230-a0-i2c")) {
+		drv_data->offload_enabled = false;
+		drv_data->errata_delay = true;
+	}
 out:
 	return rc;
 #endif
diff --git a/drivers/irqchip/irq-sirfsoc.c b/drivers/irqchip/irq-sirfsoc.c
index 4851afae38d..3a070c587ed 100644
--- a/drivers/irqchip/irq-sirfsoc.c
+++ b/drivers/irqchip/irq-sirfsoc.c
@@ -34,9 +34,10 @@ sirfsoc_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
 	struct irq_chip_type *ct;
 	int ret;
 	unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
+	unsigned int set = IRQ_LEVEL;
 
 	ret = irq_alloc_domain_generic_chips(sirfsoc_irqdomain, num, 1, "irq_sirfsoc",
-		handle_level_irq, clr, 0, IRQ_GC_INIT_MASK_CACHE);
+		handle_level_irq, clr, set, IRQ_GC_INIT_MASK_CACHE);
 
 	gc = irq_get_domain_generic_chip(sirfsoc_irqdomain, irq_start);
 	gc->reg_base = base;