diff options
| author | Martyn Welch <martyn.welch@ge.com> | 2013-06-11 17:03:14 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-06-17 16:41:50 -0700 |
| commit | 2981795cc0c02d12d0e231bfe22480564b937cd5 (patch) | |
| tree | 57f68379f098b7b32e890b38f6e0bdfb8c7694c6 /drivers | |
| parent | e31c51e4a1d11ed0b61557ca9da9cf18c8855531 (diff) | |
vme: tsi148: CR/CSR logic arround the wrong way
The logic in the init routine for the TSI148 is inverted. It isn't switching
on the CR/CSR space when it should be and is reporting it's on when its not.
Correct the logic to do the right thing.
Reported-by: De Roo, Steven <steven.deroo@arcelormittal.com>
Signed-off-by: Martyn Welch <martyn.welch@ge.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/vme/bridges/vme_tsi148.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/vme/bridges/vme_tsi148.c b/drivers/vme/bridges/vme_tsi148.c index 94ce64d7a5f..c04600e26a3 100644 --- a/drivers/vme/bridges/vme_tsi148.c +++ b/drivers/vme/bridges/vme_tsi148.c @@ -2300,12 +2300,13 @@ static int tsi148_crcsr_init(struct vme_bridge *tsi148_bridge, dev_info(tsi148_bridge->parent, "CR/CSR Offset: %d\n", cbar); crat = ioread32be(bridge->base + TSI148_LCSR_CRAT); - if (crat & TSI148_LCSR_CRAT_EN) { + if (crat & TSI148_LCSR_CRAT_EN) + dev_info(tsi148_bridge->parent, "CR/CSR already enabled\n"); + else { dev_info(tsi148_bridge->parent, "Enabling CR/CSR space\n"); iowrite32be(crat | TSI148_LCSR_CRAT_EN, bridge->base + TSI148_LCSR_CRAT); - } else - dev_info(tsi148_bridge->parent, "CR/CSR already enabled\n"); + } /* If we want flushed, error-checked writes, set up a window * over the CR/CSR registers. We read from here to safely flush |