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authorTomi Valkeinen <tomi.valkeinen@ti.com>2012-12-12 10:37:03 +0200
committerTomi Valkeinen <tomi.valkeinen@ti.com>2012-12-12 13:34:13 +0200
commit5aaee69d7fe02d1ffb76b6a31a588efa5f2742e3 (patch)
tree888cd43ba85b3baf7741f598f1ddcac30b3a2003 /drivers/video/omap2/dss/dispc.c
parentd10ecc5887a5671f2c71752b1624549a4a48b1fe (diff)
OMAPDSS: DISPC: get dss clock rate from dss driver
Dispc currently gets dispc's fck with clk_get() and uses clk_get_rate() to get the rate for scaling calculations. This causes a problem with common clock framework, as omapdss uses the dispc functions inside a spinlock, and common clock framework uses a mutex in clk_get_rate(). Looking at the DSS clock tree, the above use of the dispc fck is not quite correct. The DSS_FCLK from PRCM goes to DSS core block, which has a mux to select the clock for DISPC from various options, so the current use of dispc fck bypasses that. Fortunately we never change the dispc clock mux for now. To fix the issue with clk_get_rate(), this patch caches the dss clock rate in dss.c when it is set. Dispc will then ask for the clock rate from dss. While this is not very elegant, it does fix the issue, and it's not totally wrong when considering that the dispc fck actually comes via dss. In the future we should probably look into common clock framework and see if that could be used to represent the DSS clock tree properly. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2/dss/dispc.c')
-rw-r--r--drivers/video/omap2/dss/dispc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index fedbd2c8e97..08137a8a38c 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -2970,7 +2970,7 @@ unsigned long dispc_fclk_rate(void)
switch (dss_get_dispc_clk_source()) {
case OMAP_DSS_CLK_SRC_FCK:
- r = clk_get_rate(dispc.dss_clk);
+ r = dss_get_dispc_clk_rate();
break;
case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC:
dsidev = dsi_get_dsidev_from_id(0);
@@ -3002,7 +3002,7 @@ unsigned long dispc_mgr_lclk_rate(enum omap_channel channel)
switch (dss_get_lcd_clk_source(channel)) {
case OMAP_DSS_CLK_SRC_FCK:
- r = clk_get_rate(dispc.dss_clk);
+ r = dss_get_dispc_clk_rate();
break;
case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC:
dsidev = dsi_get_dsidev_from_id(0);