diff options
author | Arjan van de Ven <arjan@linux.intel.com> | 2008-10-17 09:20:26 -0700 |
---|---|---|
committer | Arjan van de Ven <arjan@linux.intel.com> | 2008-10-17 09:20:26 -0700 |
commit | 651dab4264e4ba0e563f5ff56f748127246e9065 (patch) | |
tree | 016630974bdcb00fe529b673f96d389e0fd6dc94 /drivers/video/omap/dispc.c | |
parent | 40b8606253552109815786e5d4b0de98782d31f5 (diff) | |
parent | 2e532d68a2b3e2aa6b19731501222069735c741c (diff) |
Merge commit 'linus/master' into merge-linus
Conflicts:
arch/x86/kvm/i8254.c
Diffstat (limited to 'drivers/video/omap/dispc.c')
-rw-r--r-- | drivers/video/omap/dispc.c | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c index 6efcf89e7fb..dfb72f5e4c9 100644 --- a/drivers/video/omap/dispc.c +++ b/drivers/video/omap/dispc.c @@ -156,7 +156,7 @@ struct resmap { }; static struct { - u32 base; + void __iomem *base; struct omapfb_mem_desc mem_desc; struct resmap *res_map[DISPC_MEMTYPE_NUM]; @@ -212,9 +212,9 @@ static void enable_rfbi_mode(int enable) dispc_write_reg(DISPC_CONTROL, l); /* Set bypass mode in RFBI module */ - l = __raw_readl(io_p2v(RFBI_CONTROL)); + l = __raw_readl(IO_ADDRESS(RFBI_CONTROL)); l |= enable ? 0 : (1 << 1); - __raw_writel(l, io_p2v(RFBI_CONTROL)); + __raw_writel(l, IO_ADDRESS(RFBI_CONTROL)); } static void set_lcd_data_lines(int data_lines) @@ -1349,14 +1349,19 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode, memset(&dispc, 0, sizeof(dispc)); - dispc.base = io_p2v(DISPC_BASE); + dispc.base = ioremap(DISPC_BASE, SZ_1K); + if (!dispc.base) { + dev_err(fbdev->dev, "can't ioremap DISPC\n"); + return -ENOMEM; + } + dispc.fbdev = fbdev; dispc.ext_mode = ext_mode; init_completion(&dispc.frame_done); if ((r = get_dss_clocks()) < 0) - return r; + goto fail0; enable_interface_clocks(1); enable_lcd_clocks(1); @@ -1414,7 +1419,7 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode, } /* L3 firewall setting: enable access to OCM RAM */ - __raw_writel(0x402000b0, io_p2v(0x680050a0)); + __raw_writel(0x402000b0, IO_ADDRESS(0x680050a0)); if ((r = alloc_palette_ram()) < 0) goto fail2; @@ -1464,7 +1469,8 @@ fail1: enable_lcd_clocks(0); enable_interface_clocks(0); put_dss_clocks(); - +fail0: + iounmap(dispc.base); return r; } @@ -1481,6 +1487,7 @@ static void omap_dispc_cleanup(void) free_irq(INT_24XX_DSS_IRQ, dispc.fbdev); enable_interface_clocks(0); put_dss_clocks(); + iounmap(dispc.base); } const struct lcd_ctrl omap2_int_ctrl = { |