Linux-2.6.12-rc2v2.6.12-rc2

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!

8 files changed, 3793 insertions, 0 deletions

diff --git a/drivers/video/i810/Makefile b/drivers/video/i810/Makefile
new file mode 100644
index 00000000000..794ae76c7c4
--- /dev/null
+++ b/drivers/video/i810/Makefile
@@ -0,0 +1,14 @@
+#
+# Makefile for the Intel 810/815 framebuffer driver
+#
+
+obj-$(CONFIG_FB_I810)		+= i810fb.o
+
+
+i810fb-objs                     := i810_main.o i810_accel.o
+
+ifdef CONFIG_FB_I810_GTF
+i810fb-objs                     += i810_gtf.o
+else
+i810fb-objs                     += i810_dvt.o
+endif
diff --git a/drivers/video/i810/i810.h b/drivers/video/i810/i810.h
new file mode 100644
index 00000000000..fe3b7579475
--- /dev/null
+++ b/drivers/video/i810/i810.h
@@ -0,0 +1,285 @@
+/*-*- linux-c -*-
+ *  linux/drivers/video/i810.h -- Intel 810 General Definitions/Declarations
+ *
+ *      Copyright (C) 2001 Antonino Daplas<adaplas@pol.net>
+ *      All Rights Reserved      
+ *
+ *
+ *  This file is subject to the terms and conditions of the GNU General Public
+ *  License. See the file COPYING in the main directory of this archive for
+ *  more details.
+ */
+
+#ifndef __I810_H__
+#define __I810_H__
+
+#include <linux/list.h>
+#include <linux/agp_backend.h>
+#include <linux/fb.h>
+#include <video/vga.h>
+
+/* Fence */
+#define TILEWALK_X            (0 << 12)
+#define TILEWALK_Y            (1 << 12)
+
+/* Raster ops */
+#define COLOR_COPY_ROP        0xF0
+#define PAT_COPY_ROP          0xCC
+#define CLEAR_ROP             0x00
+#define WHITE_ROP             0xFF
+#define INVERT_ROP            0x55
+#define XOR_ROP               0x5A
+
+/* 2D Engine definitions */
+#define SOLIDPATTERN          0x80000000
+#define NONSOLID              0x00000000
+#define BPP8                  (0 << 24)
+#define BPP16                 (1 << 24)
+#define BPP24                 (2 << 24)
+
+#define PIXCONF8              (2 << 16)
+#define PIXCONF15             (4 << 16)
+#define PIXCONF16             (5 << 16)
+#define PIXCONF24             (6 << 16)
+#define PIXCONF32             (7 << 16)
+
+#define DYN_COLOR_EN          (1 << 26)
+#define DYN_COLOR_DIS         (0 << 26)
+#define INCREMENT             0x00000000
+#define DECREMENT             (0x01 << 30)
+#define ARB_ON                0x00000001
+#define ARB_OFF               0x00000000
+#define SYNC_FLIP             0x00000000
+#define ASYNC_FLIP            0x00000040
+#define OPTYPE_MASK           0xE0000000
+#define PARSER_MASK           0x001F8000 
+#define D2_MASK               0x001FC000         /* 2D mask */
+
+/* Instruction type */
+/* There are more but pertains to 3D */
+#define PARSER                0x00000000
+#define BLIT                  (0x02 << 29)
+#define RENDER                (0x03 << 29)
+            
+/* Parser */
+#define NOP                   0x00               /* No operation, padding */
+#define BP_INT                (0x01 << 23)         /* Breakpoint interrupt */
+#define USR_INT               (0x02 << 23)         /* User interrupt */
+#define WAIT_FOR_EVNT         (0x03 << 23)         /* Wait for event */
+#define FLUSH                 (0x04 << 23)              
+#define CONTEXT_SEL           (0x05 << 23)
+#define REPORT_HEAD           (0x07 << 23)
+#define ARB_ON_OFF            (0x08 << 23)
+#define OVERLAY_FLIP          (0x11 << 23)
+#define LOAD_SCAN_INC         (0x12 << 23)
+#define LOAD_SCAN_EX          (0x13 << 23)
+#define FRONT_BUFFER          (0x14 << 23)
+#define DEST_BUFFER           (0x15 << 23)
+#define Z_BUFFER              (0x16 << 23)       
+
+#define STORE_DWORD_IMM       (0x20 << 23)
+#define STORE_DWORD_IDX       (0x21 << 23)
+#define BATCH_BUFFER          (0x30 << 23)
+
+/* Blit */
+#define SETUP_BLIT                      0x00
+#define SETUP_MONO_PATTERN_SL_BLT       (0x10 << 22)
+#define PIXEL_BLT                       (0x20 << 22)
+#define SCANLINE_BLT                    (0x21 << 22)
+#define TEXT_BLT                        (0x22 << 22)
+#define TEXT_IMM_BLT                    (0x30 << 22)
+#define COLOR_BLT                       (0x40 << 22)
+#define MONO_PAT_BLIT                   (0x42 << 22)
+#define SOURCE_COPY_BLIT                (0x43 << 22)
+#define MONO_SOURCE_COPY_BLIT           (0x44 << 22)
+#define SOURCE_COPY_IMMEDIATE           (0x60 << 22)
+#define MONO_SOURCE_COPY_IMMEDIATE      (0x61 << 22)
+
+#define VERSION_MAJOR            0
+#define VERSION_MINOR            9
+#define VERSION_TEENIE           0
+#define BRANCH_VERSION           ""
+
+
+/* mvo: intel i815 */
+#ifndef PCI_DEVICE_ID_INTEL_82815_100
+  #define PCI_DEVICE_ID_INTEL_82815_100           0x1102
+#endif
+#ifndef PCI_DEVICE_ID_INTEL_82815_NOAGP
+  #define PCI_DEVICE_ID_INTEL_82815_NOAGP         0x1112
+#endif
+#ifndef PCI_DEVICE_ID_INTEL_82815_FULL_CTRL
+  #define PCI_DEVICE_ID_INTEL_82815_FULL_CTRL     0x1130
+#endif 
+
+/* General Defines */
+#define I810_PAGESIZE               4096
+#define MAX_DMA_SIZE                (1024 * 4096)
+#define SAREA_SIZE                  4096
+#define PCI_I810_MISCC              0x72
+#define MMIO_SIZE                   (512*1024)
+#define GTT_SIZE                    (16*1024) 
+#define RINGBUFFER_SIZE             (64*1024)
+#define CURSOR_SIZE                 4096 
+#define OFF                         0
+#define ON                          1
+#define MAX_KEY                     256
+#define WAIT_COUNT                  10000000
+#define IRING_PAD                   8
+#define FONTDATAMAX                 8192
+/* Masks (AND ops) and OR's */
+#define FB_START_MASK               (0x3f << (32 - 6))
+#define MMIO_ADDR_MASK              (0x1FFF << (32 - 13))
+#define FREQ_MASK                   0x1EF
+#define SCR_OFF                     0x20
+#define DRAM_ON                     0x08            
+#define DRAM_OFF                    0xE7
+#define PG_ENABLE_MASK              0x01
+#define RING_SIZE_MASK              (RINGBUFFER_SIZE - 1);
+
+/* defines for restoring registers partially */
+#define ADDR_MAP_MASK               (0x07 << 5)
+#define DISP_CTRL                   ~0
+#define PIXCONF_0                   (0x64 << 8)
+#define PIXCONF_2                   (0xF3 << 24)
+#define PIXCONF_1                   (0xF0 << 16)
+#define MN_MASK                     0x3FF03FF
+#define P_OR                        (0x7 << 4)                    
+#define DAC_BIT                     (1 << 16)
+#define INTERLACE_BIT               (1 << 7)
+#define IER_MASK                    (3 << 13)
+#define IMR_MASK                    (3 << 13)
+
+/* Power Management */
+#define DPMS_MASK                   0xF0000
+#define POWERON                     0x00000
+#define STANDBY                     0x20000
+#define SUSPEND                     0x80000
+#define POWERDOWN                   0xA0000
+#define EMR_MASK                    ~0x3F
+#define FW_BLC_MASK                 ~(0x3F|(7 << 8)|(0x3F << 12)|(7 << 20))
+
+/* Ringbuffer */
+#define RBUFFER_START_MASK          0xFFFFF000
+#define RBUFFER_SIZE_MASK           0x001FF000
+#define RBUFFER_HEAD_MASK           0x001FFFFC
+#define RBUFFER_TAIL_MASK           0x001FFFF8
+
+/* Video Timings */
+#define REF_FREQ                    24000000
+#define TARGET_N_MAX                30
+
+#define MAX_PIXELCLOCK              230000000
+#define MIN_PIXELCLOCK               15000000
+#define VFMAX                       60
+#define VFMIN                       60
+#define HFMAX                       30000
+#define HFMIN                       29000
+
+/* Cursor */
+#define CURSOR_ENABLE_MASK          0x1000             
+#define CURSOR_MODE_64_TRANS        4
+#define CURSOR_MODE_64_XOR	    5
+#define CURSOR_MODE_64_3C	    6	
+#define COORD_INACTIVE              0
+#define COORD_ACTIVE                (1 << 4)
+#define EXTENDED_PALETTE	    1
+  
+/* AGP Memory Types*/
+#define AGP_NORMAL_MEMORY           0
+#define AGP_DCACHE_MEMORY	    1
+#define AGP_PHYSICAL_MEMORY         2
+
+/* Allocated resource Flags */
+#define FRAMEBUFFER_REQ             1
+#define MMIO_REQ                    2
+#define PCI_DEVICE_ENABLED          4
+#define HAS_FONTCACHE               8 
+
+/* driver flags */
+#define HAS_MTRR                    1
+#define HAS_ACCELERATION            2
+#define ALWAYS_SYNC                 4
+#define LOCKUP                      8
+#define USE_HWCUR                  16
+
+struct gtt_data {
+	struct agp_memory *i810_fb_memory;
+	struct agp_memory *i810_cursor_memory;
+};
+
+struct mode_registers {
+	u32 pixclock, M, N, P;
+	u8 cr00, cr01, cr02, cr03;
+	u8 cr04, cr05, cr06, cr07;
+	u8 cr09, cr10, cr11, cr12;
+	u8 cr13, cr15, cr16, cr30;
+	u8 cr31, cr32, cr33, cr35, cr39;
+	u32 bpp8_100, bpp16_100;
+	u32 bpp24_100, bpp8_133;
+	u32 bpp16_133, bpp24_133;
+	u8 msr;
+};
+
+struct heap_data {
+        unsigned long physical;
+	__u8 __iomem *virtual;
+	u32 offset;
+	u32 size;
+};	
+
+struct state_registers {
+	u32 dclk_1d, dclk_2d, dclk_0ds;
+	u32 pixconf, fw_blc, pgtbl_ctl;
+	u32 fence0, hws_pga, dplystas;
+	u16 bltcntl, hwstam, ier, iir, imr;
+	u8 cr00, cr01, cr02, cr03, cr04;
+	u8 cr05, cr06, cr07, cr08, cr09;
+	u8 cr10, cr11, cr12, cr13, cr14;
+	u8 cr15, cr16, cr17, cr80, gr10;
+	u8 cr30, cr31, cr32, cr33, cr35;
+	u8 cr39, cr41, cr70, sr01, msr;
+};
+
+struct i810fb_par {
+	struct mode_registers    regs;
+	struct state_registers   hw_state;
+	struct gtt_data          i810_gtt;
+	struct fb_ops            i810fb_ops;
+	struct pci_dev           *dev;
+	struct heap_data         aperture;
+	struct heap_data         fb;
+	struct heap_data         iring;
+	struct heap_data         cursor_heap;
+	struct vgastate          state;
+	atomic_t                 use_count;
+	u32 pseudo_palette[17];
+	unsigned long mmio_start_phys;
+	u8 __iomem *mmio_start_virtual;
+	u32 pitch;
+	u32 pixconf;
+	u32 watermark;
+	u32 mem_freq;
+	u32 res_flags;
+	u32 dev_flags;
+	u32 cur_tail;
+	u32 depth;
+	u32 blit_bpp;
+	u32 ovract;
+	u32 cur_state;
+	int mtrr_reg;
+	u16 bltcntl;
+	u8 interlace;
+};
+
+/* 
+ * Register I/O
+ */
+#define i810_readb(where, mmio) readb(mmio + where)
+#define i810_readw(where, mmio) readw(mmio + where)
+#define i810_readl(where, mmio) readl(mmio + where)
+#define i810_writeb(where, mmio, val) writeb(val, mmio + where) 
+#define i810_writew(where, mmio, val) writew(val, mmio + where)
+#define i810_writel(where, mmio, val) writel(val, mmio + where)
+
+#endif /* __I810_H__ */
diff --git a/drivers/video/i810/i810_accel.c b/drivers/video/i810/i810_accel.c
new file mode 100644
index 00000000000..64cd1c827cf
--- /dev/null
+++ b/drivers/video/i810/i810_accel.c
@@ -0,0 +1,449 @@
+/*-*- linux-c -*-
+ *  linux/drivers/video/i810_accel.c -- Hardware Acceleration
+ *
+ *      Copyright (C) 2001 Antonino Daplas<adaplas@pol.net>
+ *      All Rights Reserved      
+ *
+ *  This file is subject to the terms and conditions of the GNU General Public
+ *  License. See the file COPYING in the main directory of this archive for
+ *  more details.
+ */
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/fb.h>
+
+#include "i810_regs.h"
+#include "i810.h"
+
+static u32 i810fb_rop[] = {
+	COLOR_COPY_ROP, /* ROP_COPY */
+	XOR_ROP         /* ROP_XOR  */
+};
+
+/* Macros */
+#define PUT_RING(n) {                                        \
+	i810_writel(par->cur_tail, par->iring.virtual, n);   \
+        par->cur_tail += 4;                                  \
+        par->cur_tail &= RING_SIZE_MASK;                     \
+}                                                                      
+
+extern void flush_cache(void);
+
+/************************************************************/
+
+/* BLT Engine Routines */
+static inline void i810_report_error(u8 __iomem *mmio)
+{
+	printk("IIR     : 0x%04x\n"
+	       "EIR     : 0x%04x\n"
+	       "PGTBL_ER: 0x%04x\n"
+	       "IPEIR   : 0x%04x\n"
+	       "IPEHR   : 0x%04x\n",
+	       i810_readw(IIR, mmio),
+	       i810_readb(EIR, mmio),
+	       i810_readl(PGTBL_ER, mmio),
+	       i810_readl(IPEIR, mmio), 
+	       i810_readl(IPEHR, mmio));
+}
+
+/**
+ * wait_for_space - check ring buffer free space
+ * @space: amount of ringbuffer space needed in bytes
+ * @par: pointer to i810fb_par structure
+ *
+ * DESCRIPTION:
+ * The function waits until a free space from the ringbuffer
+ * is available 
+ */	
+static inline int wait_for_space(struct fb_info *info, u32 space)
+{
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
+	u32 head, count = WAIT_COUNT, tail;
+	u8 __iomem *mmio = par->mmio_start_virtual;
+
+	tail = par->cur_tail;
+	while (count--) {
+		head = i810_readl(IRING + 4, mmio) & RBUFFER_HEAD_MASK;	
+		if ((tail == head) || 
+		    (tail > head && 
+		     (par->iring.size - tail + head) >= space) || 
+		    (tail < head && (head - tail) >= space)) {
+			return 0;	
+		}
+	}
+	printk("ringbuffer lockup!!!\n");
+	i810_report_error(mmio); 
+	par->dev_flags |= LOCKUP;
+	info->pixmap.scan_align = 1;
+	return 1;
+}
+
+/** 
+ * wait_for_engine_idle - waits for all hardware engines to finish
+ * @par: pointer to i810fb_par structure
+ *
+ * DESCRIPTION:
+ * This waits for lring(0), iring(1), and batch(3), etc to finish and
+ * waits until ringbuffer is empty.
+ */
+static inline int wait_for_engine_idle(struct fb_info *info)
+{
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
+	u8 __iomem *mmio = par->mmio_start_virtual;
+	int count = WAIT_COUNT;
+
+	if (wait_for_space(info, par->iring.size)) /* flush */
+		return 1;
+
+	while((i810_readw(INSTDONE, mmio) & 0x7B) != 0x7B && --count); 
+	if (count) return 0;
+
+	printk("accel engine lockup!!!\n");
+	printk("INSTDONE: 0x%04x\n", i810_readl(INSTDONE, mmio));
+	i810_report_error(mmio); 
+	par->dev_flags |= LOCKUP;
+	info->pixmap.scan_align = 1;
+	return 1;
+}
+
+/* begin_iring - prepares the ringbuffer 
+ * @space: length of sequence in dwords
+ * @par: pointer to i810fb_par structure
+ *
+ * DESCRIPTION:
+ * Checks/waits for sufficent space in ringbuffer of size
+ * space.  Returns the tail of the buffer
+ */ 
+static inline u32 begin_iring(struct fb_info *info, u32 space)
+{
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
+
+	if (par->dev_flags & ALWAYS_SYNC) 
+		wait_for_engine_idle(info);
+	return wait_for_space(info, space);
+}
+
+/**
+ * end_iring - advances the buffer
+ * @par: pointer to i810fb_par structure
+ *
+ * DESCRIPTION:
+ * This advances the tail of the ringbuffer, effectively
+ * beginning the execution of the graphics instruction sequence.
+ */
+static inline void end_iring(struct i810fb_par *par)
+{
+	u8 __iomem *mmio = par->mmio_start_virtual;
+
+	i810_writel(IRING, mmio, par->cur_tail);
+}
+
+/**
+ * source_copy_blit - BLIT transfer operation
+ * @dwidth: width of rectangular graphics data
+ * @dheight: height of rectangular graphics data
+ * @dpitch: bytes per line of destination buffer
+ * @xdir: direction of copy (left to right or right to left)
+ * @src: address of first pixel to read from
+ * @dest: address of first pixel to write to
+ * @from: source address
+ * @where: destination address
+ * @rop: raster operation
+ * @blit_bpp: pixel format which can be different from the 
+ *            framebuffer's pixelformat
+ * @par: pointer to i810fb_par structure
+ *
+ * DESCRIPTION:
+ * This is a BLIT operation typically used when doing
+ * a 'Copy and Paste'
+ */
+static inline void source_copy_blit(int dwidth, int dheight, int dpitch, 
+				    int xdir, int src, int dest, int rop, 
+				    int blit_bpp, struct fb_info *info)
+{
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
+
+	if (begin_iring(info, 24 + IRING_PAD)) return;
+
+	PUT_RING(BLIT | SOURCE_COPY_BLIT | 4);
+	PUT_RING(xdir | rop << 16 | dpitch | DYN_COLOR_EN | blit_bpp);
+	PUT_RING(dheight << 16 | dwidth);
+	PUT_RING(dest);
+	PUT_RING(dpitch);
+	PUT_RING(src);
+
+	end_iring(par);
+}	
+
+/**
+ * color_blit - solid color BLIT operation
+ * @width: width of destination
+ * @height: height of destination
+ * @pitch: pixels per line of the buffer
+ * @dest: address of first pixel to write to
+ * @where: destination
+ * @rop: raster operation
+ * @what: color to transfer
+ * @blit_bpp: pixel format which can be different from the 
+ *            framebuffer's pixelformat
+ * @par: pointer to i810fb_par structure
+ *
+ * DESCRIPTION:
+ * A BLIT operation which can be used for  color fill/rectangular fill
+ */
+static inline void color_blit(int width, int height, int pitch,  int dest, 
+			      int rop, int what, int blit_bpp, 
+			      struct fb_info *info)
+{
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
+
+	if (begin_iring(info, 24 + IRING_PAD)) return;
+
+	PUT_RING(BLIT | COLOR_BLT | 3);
+	PUT_RING(rop << 16 | pitch | SOLIDPATTERN | DYN_COLOR_EN | blit_bpp);
+	PUT_RING(height << 16 | width);
+	PUT_RING(dest);
+	PUT_RING(what);
+	PUT_RING(NOP);
+
+	end_iring(par);
+}
+ 
+/**
+ * mono_src_copy_imm_blit - color expand from system memory to framebuffer
+ * @dwidth: width of destination
+ * @dheight: height of destination
+ * @dpitch: pixels per line of the buffer
+ * @dsize: size of bitmap in double words
+ * @dest: address of first byte of pixel;
+ * @rop: raster operation
+ * @blit_bpp: pixelformat to use which can be different from the 
+ *            framebuffer's pixelformat
+ * @src: address of image data
+ * @bg: backgound color
+ * @fg: forground color
+ * @par: pointer to i810fb_par structure
+ *
+ * DESCRIPTION:
+ * A color expand operation where the  source data is placed in the 
+ * ringbuffer itself. Useful for drawing text. 
+ *
+ * REQUIREMENT:
+ * The end of a scanline must be padded to the next word.
+ */
+static inline void mono_src_copy_imm_blit(int dwidth, int dheight, int dpitch,
+					  int dsize, int blit_bpp, int rop,
+					  int dest, const u32 *src, int bg,
+					  int fg, struct fb_info *info)
+{
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
+
+	if (begin_iring(info, 24 + (dsize << 2) + IRING_PAD)) return;
+
+	PUT_RING(BLIT | MONO_SOURCE_COPY_IMMEDIATE | (4 + dsize));
+	PUT_RING(DYN_COLOR_EN | blit_bpp | rop << 16 | dpitch);
+	PUT_RING(dheight << 16 | dwidth);
+	PUT_RING(dest);
+	PUT_RING(bg);
+	PUT_RING(fg);
+	while (dsize--) 
+		PUT_RING(*src++);
+
+	end_iring(par);
+}
+
+static inline void load_front(int offset, struct fb_info *info)
+{
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
+
+	if (begin_iring(info, 8 + IRING_PAD)) return;
+
+	PUT_RING(PARSER | FLUSH);
+	PUT_RING(NOP);
+
+	end_iring(par);
+
+	if (begin_iring(info, 8 + IRING_PAD)) return;
+
+	PUT_RING(PARSER | FRONT_BUFFER | ((par->pitch >> 3) << 8));
+	PUT_RING((par->fb.offset << 12) + offset);
+
+	end_iring(par);
+}
+
+/**
+ * i810fb_iring_enable - enables/disables the ringbuffer
+ * @mode: enable or disable
+ * @par: pointer to i810fb_par structure
+ *
+ * DESCRIPTION:
+ * Enables or disables the ringbuffer, effectively enabling or
+ * disabling the instruction/acceleration engine.
+ */
+static inline void i810fb_iring_enable(struct i810fb_par *par, u32 mode)
+{
+	u32 tmp;
+	u8 __iomem *mmio = par->mmio_start_virtual;
+
+	tmp = i810_readl(IRING + 12, mmio);
+	if (mode == OFF) 
+		tmp &= ~1;
+	else 
+		tmp |= 1;
+	flush_cache();
+	i810_writel(IRING + 12, mmio, tmp);
+}       
+
+void i810fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
+{
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
+	u32 dx, dy, width, height, dest, rop = 0, color = 0;
+
+	if (!info->var.accel_flags || par->dev_flags & LOCKUP ||
+	    par->depth == 4) 
+		return cfb_fillrect(info, rect);
+
+	if (par->depth == 1) 
+		color = rect->color;
+	else 
+		color = ((u32 *) (info->pseudo_palette))[rect->color];
+
+	rop = i810fb_rop[rect->rop];
+
+	dx = rect->dx * par->depth;
+	width = rect->width * par->depth;
+	dy = rect->dy;
+	height = rect->height;
+
+	dest = info->fix.smem_start + (dy * info->fix.line_length) + dx;
+	color_blit(width, height, info->fix.line_length, dest, rop, color, 
+		   par->blit_bpp, info);
+}
+	
+void i810fb_copyarea(struct fb_info *info, const struct fb_copyarea *region) 
+{
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
+	u32 sx, sy, dx, dy, pitch, width, height, src, dest, xdir;
+
+	if (!info->var.accel_flags || par->dev_flags & LOCKUP ||
+	    par->depth == 4)
+		return cfb_copyarea(info, region);
+
+	dx = region->dx * par->depth;
+	sx = region->sx * par->depth;
+	width = region->width * par->depth;
+	sy = region->sy;
+	dy = region->dy;
+	height = region->height;
+
+	if (dx <= sx) {
+		xdir = INCREMENT;
+	}
+	else {
+		xdir = DECREMENT;
+		sx += width - 1;
+		dx += width - 1;
+	}
+	if (dy <= sy) {
+		pitch = info->fix.line_length;
+	}
+	else {
+		pitch = (-(info->fix.line_length)) & 0xFFFF;
+		sy += height - 1;
+		dy += height - 1;
+	}
+	src = info->fix.smem_start + (sy * info->fix.line_length) + sx;
+	dest = info->fix.smem_start + (dy * info->fix.line_length) + dx;
+
+	source_copy_blit(width, height, pitch, xdir, src, dest,
+			 PAT_COPY_ROP, par->blit_bpp, info);
+}
+
+void i810fb_imageblit(struct fb_info *info, const struct fb_image *image)
+{
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
+	u32 fg = 0, bg = 0, size, dst;
+	
+	if (!info->var.accel_flags || par->dev_flags & LOCKUP ||
+	    par->depth == 4 || image->depth != 1) 
+		return cfb_imageblit(info, image);
+
+	switch (info->var.bits_per_pixel) {
+	case 8:
+		fg = image->fg_color;
+		bg = image->bg_color;
+		break;
+	case 16:
+	case 24:
+		fg = ((u32 *)(info->pseudo_palette))[image->fg_color];
+		bg = ((u32 *)(info->pseudo_palette))[image->bg_color];
+		break;
+	}	
+	
+	dst = info->fix.smem_start + (image->dy * info->fix.line_length) + 
+		(image->dx * par->depth);
+
+	size = (image->width+7)/8 + 1;
+	size &= ~1;
+	size *= image->height;
+	size += 7;
+	size &= ~7;
+	mono_src_copy_imm_blit(image->width * par->depth, 
+			       image->height, info->fix.line_length, 
+			       size/4, par->blit_bpp,
+			       PAT_COPY_ROP, dst, (u32 *) image->data, 
+			       bg, fg, info);
+} 
+
+int i810fb_sync(struct fb_info *info)
+{
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
+	
+	if (!info->var.accel_flags || par->dev_flags & LOCKUP)
+		return 0;
+
+	return wait_for_engine_idle(info);
+}
+
+void i810fb_load_front(u32 offset, struct fb_info *info)
+{
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
+	u8 __iomem *mmio = par->mmio_start_virtual;
+
+	if (!info->var.accel_flags || par->dev_flags & LOCKUP)
+		i810_writel(DPLYBASE, mmio, par->fb.physical + offset);
+	else 
+		load_front(offset, info);
+}
+
+/**
+ * i810fb_init_ringbuffer - initialize the ringbuffer
+ * @par: pointer to i810fb_par structure
+ *
+ * DESCRIPTION:
+ * Initializes the ringbuffer by telling the device the
+ * size and location of the ringbuffer.  It also sets 
+ * the head and tail pointers = 0
+ */
+void i810fb_init_ringbuffer(struct fb_info *info)
+{
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
+	u32 tmp1, tmp2;
+	u8 __iomem *mmio = par->mmio_start_virtual;
+	
+	wait_for_engine_idle(info);
+	i810fb_iring_enable(par, OFF);
+	i810_writel(IRING, mmio, 0);
+	i810_writel(IRING + 4, mmio, 0);
+	par->cur_tail = 0;
+
+	tmp2 = i810_readl(IRING + 8, mmio) & ~RBUFFER_START_MASK; 
+	tmp1 = par->iring.physical;
+	i810_writel(IRING + 8, mmio, tmp2 | tmp1);
+
+	tmp1 = i810_readl(IRING + 12, mmio);
+	tmp1 &= ~RBUFFER_SIZE_MASK;
+	tmp2 = (par->iring.size - I810_PAGESIZE) & RBUFFER_SIZE_MASK;
+	i810_writel(IRING + 12, mmio, tmp1 | tmp2);
+	i810fb_iring_enable(par, ON);
+}
diff --git a/drivers/video/i810/i810_dvt.c b/drivers/video/i810/i810_dvt.c
new file mode 100644
index 00000000000..27fa703a2e0
--- /dev/null
+++ b/drivers/video/i810/i810_dvt.c
@@ -0,0 +1,307 @@
+/*-*- linux-c -*-
+ *  linux/drivers/video/i810_dvt.c -- Intel 810 Discrete Video Timings (Intel)
+ *
+ *      Copyright (C) 2001 Antonino Daplas<adaplas@pol.net>
+ *      All Rights Reserved      
+ *
+ *
+ *  This file is subject to the terms and conditions of the GNU General Public
+ *  License. See the file COPYING in the main directory of this archive for
+ *  more details.
+ */
+
+#include <linux/kernel.h>
+
+#include "i810_regs.h"
+#include "i810.h"
+
+struct mode_registers std_modes[] = {
+	/* 640x480 @ 60Hz */
+	{ 25000, 0x0013, 0x0003, 0x40, 0x5F, 0x4F, 0x50, 0x82, 0x51, 0x9D,
+	  0x0B, 0x10, 0x40, 0xE9, 0x0B, 0xDF, 0x50, 0xE7, 0x04, 0x02,
+	  0x01, 0x01, 0x01, 0x00, 0x01, 0x22002000, 0x22004000, 0x22006000,
+	  0x22002000, 0x22004000, 0x22006000, 0xC0 }, 
+	  
+	/* 640x480 @ 70Hz */
+	{ 28000, 0x0053, 0x0010, 0x40, 0x61, 0x4F, 0x4F, 0x85, 0x52, 0x9A,
+	  0xF2, 0x10, 0x40, 0xE0, 0x03, 0xDF, 0x50, 0xDF, 0xF3, 0x01, 
+	  0x01, 0x01, 0x01, 0x00, 0x01, 0x22002000, 0x22004000, 0x22005000,
+          0x22002000, 0x22004000, 0x22005000, 0xC0 },
+          
+        /* 640x480 @ 72Hz */
+        { 31000, 0x0013, 0x0002, 0x40, 0x63, 0x4F, 0x4F, 0x87, 0x52, 0x97,
+          0x06, 0x0F, 0x40, 0xE8, 0x0B, 0xDF, 0x50, 0xDF, 0x07, 0x02, 
+          0x01, 0x01, 0x01, 0x00, 0x01, 0x22003000, 0x22005000, 0x22007000,
+          0x22003000, 0x22005000, 0x22007000, 0xC0 },
+          
+        /* 640x480 @ 75Hz */
+        { 31000, 0x0013, 0x0002, 0x40, 0x64, 0x4F, 0x4F, 0x88, 0x51, 0x99, 
+          0xF2, 0x10, 0x40, 0xE0, 0x03, 0xDF, 0x50, 0xDF, 0xF3, 0x01, 
+          0x01, 0x01, 0x01, 0x00, 0x01, 0x22003000, 0x22005000, 0x22007000, 
+          0x22003000, 0x22005000, 0x22007000, 0xC0 },
+          
+        /* 640x480 @ 85Hz */
+        { 36000, 0x0010, 0x0001, 0x40, 0x63, 0x4F, 0x4F, 0x87, 0x56, 0x9D,
+          0xFB, 0x10, 0x40, 0xE0, 0x03, 0xDF, 0x50, 0xDF, 0xFC, 0x01,
+          0x01, 0x01, 0x01, 0x00, 0x01, 0x22003000, 0x22005000, 0x22107000,
+          0x22003000, 0x22005000, 0x22107000, 0xC0 },
+          
+        /* 800x600 @ 56Hz */
+        { 36000, 0x0010, 0x0001, 0x40, 0x7B, 0x63, 0x63, 0x9F, 0x66, 0x8F,
+          0x6F, 0x10, 0x40, 0x58, 0x0A, 0x57, 0xC8, 0x57, 0x70, 0x02, 
+          0x02, 0x02, 0x02, 0x00, 0x01, 0x22003000, 0x22005000, 0x22107000,
+          0x22003000, 0x22005000, 0x22107000, 0x00 },
+          
+        /* 800x600 @ 60Hz */
+        { 40000, 0x0008, 0x0001, 0x30, 0x7F, 0x63, 0x63, 0x83, 0x68, 0x18, 
+          0x72, 0x10, 0x40, 0x58, 0x0C, 0x57, 0xC8, 0x57, 0x73, 0x02,
+          0x02, 0x02, 0x02, 0x00, 0x00, 0x22003000, 0x22006000, 0x22108000,
+          0x22003000, 0x22006000, 0x22108000, 0x00 },
+          
+        /* 800x600 @ 70Hz */
+        { 45000, 0x0054, 0x0015, 0x30, 0x7D, 0x63, 0x63, 0x81, 0x68, 0x12,
+          0x6f, 0x10, 0x40, 0x58, 0x0b, 0x57, 0x64, 0x57, 0x70, 0x02, 
+          0x02, 0x02, 0x02, 0x00, 0x00, 0x22004000, 0x22007000, 0x2210A000, 
+          0x22004000, 0x22007000, 0x2210A000, 0x00 },
+          
+        /* 800x600 @ 72Hz */
+        { 50000, 0x0017, 0x0004, 0x30, 0x7D, 0x63, 0x63, 0x81, 0x6A, 0x19,
+          0x98, 0x10, 0x40, 0x7C, 0x02, 0x57, 0xC8, 0x57, 0x99, 0x02, 
+          0x02, 0x02, 0x02, 0x00, 0x00, 0x22004000, 0x22007000, 0x2210A000,
+          0x22004000, 0x22007000, 0x2210A000, 0x00 }, 
+          
+        /* 800x600 @ 75Hz */
+        { 49000, 0x001F, 0x0006, 0x30, 0x7F, 0x63, 0x63, 0x83, 0x65, 0x0F,
+          0x6F, 0x10, 0x40, 0x58, 0x0B, 0x57, 0xC8, 0x57, 0x70, 0x02, 
+          0x02, 0x02, 0x02, 0x00, 0x00, 0x22004000, 0x22007000, 0x2210B000,
+          0x22004000, 0x22007000, 0x2210B000, 0x00 },
+          
+        /* 800x600 @ 85Hz */
+        { 56000, 0x0049, 0x000E, 0x30, 0x7E, 0x63, 0x63, 0x82, 0x67, 0x0F,
+          0x75, 0x10, 0x40, 0x58, 0x0B, 0x57, 0xC8, 0x57, 0x76, 0x02,
+          0x02, 0x02, 0x02, 0x00, 0x00, 0x22004000, 0x22108000, 0x2210b000, 
+          0x22004000, 0x22108000, 0x2210b000, 0x00 },
+          
+        /* 1024x768 @ 60Hz */
+        { 65000, 0x003F, 0x000A, 0x30, 0xA3, 0x7F, 0x7F, 0x87, 0x83, 0x94,
+          0x24, 0x10, 0x40, 0x02, 0x08, 0xFF, 0x80, 0xFF, 0x25, 0x03,
+          0x02, 0x03, 0x02, 0x00, 0x00, 0x22005000, 0x22109000, 0x2220D000,
+          0x22005000, 0x22109000, 0x2220D000, 0xC0 },
+          
+        /* 1024x768 @ 70Hz */
+	{ 75000, 0x0017, 0x0002, 0x30, 0xA1, 0x7F, 0x7F, 0x85, 0x82, 0x93,
+	  0x24, 0x10, 0x40, 0x02, 0x08, 0xFF, 0x80, 0xFF, 0x25, 0x03,
+	  0x02, 0x03, 0x02, 0x00, 0x00, 0x22005000, 0x2210A000, 0x2220F000,
+	  0x22005000, 0x2210A000, 0x2220F000, 0xC0 }, 
+	  
+	/* 1024x768 @ 75Hz */          
+	{ 78000, 0x0050, 0x0017, 0x20, 0x9F, 0x7F, 0x7F, 0x83, 0x81, 0x8D,
+	  0x1E, 0x10, 0x40, 0x00, 0x03, 0xFF, 0x80, 0xFF, 0x1F, 0x03,
+	  0x02, 0x03, 0x02, 0x00, 0x00, 0x22006000, 0x2210B000, 0x22210000,
+	  0x22006000, 0x2210B000, 0x22210000, 0x00 },
+	  
+	/* 1024x768 @ 85Hz */
+	{ 94000, 0x003D, 0x000E, 0x20, 0xA7, 0x7F, 0x7F, 0x8B, 0x85, 0x91,
+	  0x26, 0x10, 0x40, 0x00, 0x03, 0xFF, 0x80, 0xFF, 0x27, 0x03,
+	  0x02, 0x03, 0x02, 0x00, 0x00, 0x22007000, 0x2220E000, 0x22212000,
+	  0x22007000, 0x2220E000, 0x22212000, 0x00 },
+	  
+	/* 1152x864 @ 60Hz */ 
+	{ 80000, 0x0008, 0x0001, 0x20, 0xB3, 0x8F, 0x8F, 0x97, 0x93, 0x9f,
+	  0x87, 0x10, 0x40, 0x60, 0x03, 0x5F, 0x90, 0x5f, 0x88, 0x03,
+	  0x03, 0x03, 0x03, 0x00, 0x00, 0x2220C000, 0x22210000, 0x22415000,   
+	  0x2220C000, 0x22210000, 0x22415000, 0x00 },
+	  
+	/* 1152x864 @ 70Hz */
+	{ 96000, 0x000a, 0x0001, 0x20, 0xbb, 0x8F, 0x8F, 0x9f, 0x98, 0x87, 
+	  0x82, 0x10, 0x40, 0x60, 0x03, 0x5F, 0x90, 0x5F, 0x83, 0x03,
+	  0x03, 0x03, 0x03, 0x00, 0x00, 0x22107000, 0x22210000, 0x22415000,
+	  0x22107000, 0x22210000, 0x22415000, 0x00 },
+	  
+	/* 1152x864 @ 72Hz */
+	{ 99000, 0x001f, 0x0006, 0x20, 0xbb, 0x8F, 0x8F, 0x9f, 0x98, 0x87,
+	  0x83, 0x10, 0x40, 0x60, 0x03, 0x5F, 0x90, 0x5F, 0x84, 0x03,
+	  0x03, 0x03, 0x03, 0x00, 0x00, 0x22107000, 0x22210000, 0x22415000,
+	  0x22107000, 0x22210000, 0x22415000, 0x00 },
+	  
+	/* 1152x864 @ 75Hz */
+	{ 108000, 0x0010, 0x0002, 0x20, 0xC3, 0x8F, 0x8F, 0x87, 0x97, 0x07,
+	  0x82, 0x10, 0x40, 0x60, 0x03, 0x5F, 0x90, 0x5F, 0x83, 0x03, 
+	  0x03, 0x03, 0x03, 0x00, 0x01, 0x22107000, 0x22210000, 0x22415000,
+	  0x22107000, 0x22210000, 0x22415000, 0x00 },
+	  
+	/* 1152x864 @ 85Hz */
+	{ 121000, 0x006D, 0x0014, 0x20, 0xc0, 0x8F, 0x8F, 0x84, 0x97, 0x07,
+	  0x93, 0x10, 0x40, 0x60, 0x03, 0x5F, 0x90, 0x5F, 0x94, 0x03, 
+	  0x03, 0x03, 0x03, 0x00, 0x01, 0x2220C000, 0x22210000, 0x22415000,
+	  0x2220C000, 0x22210000, 0x22415000, 0x0 },
+	  
+	/* 1280x960 @ 60Hz */
+	{ 108000, 0x0010, 0x0002, 0x20, 0xDC, 0x9F, 0x9F, 0x80, 0xAB, 0x99,
+	  0xE6, 0x10, 0x40, 0xC0, 0x03, 0xBF, 0xA0, 0xBF, 0xE7, 0x03,
+	  0x03, 0x03, 0x03, 0x00, 0x01, 0x2210A000, 0x22210000, 0x22415000,
+	  0x2210A000, 0x22210000, 0x22415000, 0x00 },
+	  
+	/* 1280x960 @ 75Hz */
+	{ 129000, 0x0029, 0x0006, 0x20, 0xD3, 0x9F, 0x9F, 0x97, 0xaa, 0x1b,
+	  0xE8, 0x10, 0x40, 0xC0, 0x03, 0xBF, 0xA0, 0xBF, 0xE9, 0x03,
+	  0x03, 0x03, 0x03, 0x00, 0x01, 0x2210A000, 0x22210000, 0x2241B000,
+	  0x2210A000, 0x22210000, 0x2241B000, 0x00 },
+	  
+	/* 1280x960 @ 85Hz */
+	{ 148000, 0x0042, 0x0009, 0x20, 0xD3, 0x9F, 0x9F, 0x97, 0xA7, 0x1B,
+	  0xF1, 0x10, 0x40, 0xC0, 0x03, 0xBF, 0xA0, 0xBF, 0xF2, 0x03,
+	  0x03, 0x03, 0x03, 0x00, 0x01, 0x2210A000, 0x22220000, 0x2241D000,       
+	  0x2210A000, 0x22220000, 0x2241D000, 0x00 },
+	  
+	/* 1600x1200 @ 60Hz */
+	{ 162000, 0x0019, 0x0006, 0x10, 0x09, 0xC7, 0xC7, 0x8D, 0xcf, 0x07,
+	  0xE0, 0x10, 0x40, 0xB0, 0x03, 0xAF, 0xC8, 0xAF, 0xE1, 0x04, 
+	  0x04, 0x04, 0x04, 0x01, 0x00, 0x2210b000, 0x22416000, 0x44419000,
+	  0x2210b000, 0x22416000, 0x44419000, 0x00 },
+	  
+	/* 1600x1200 @ 65 Hz */
+	{ 175000, 0x005d, 0x0018, 0x10, 0x09, 0xC7, 0xC7, 0x8D, 0xcf, 0x07,
+	  0xE0, 0x10, 0x40, 0xB0, 0x03, 0xAF, 0xC8, 0xAF, 0xE1, 0x04, 
+	  0x04, 0x04, 0x04, 0x01, 0x00, 0x2210c000, 0x22416000, 0x44419000,
+	  0x2210c000, 0x22416000, 0x44419000, 0x00 },
+	  
+	/* 1600x1200 @ 70 Hz */
+	{ 189000, 0x003D, 0x000e, 0x10, 0x09, 0xC7, 0xC7, 0x8d, 0xcf, 0x07,
+	  0xE0, 0x10, 0x40, 0xb0, 0x03, 0xAF, 0xC8, 0xaf, 0xE1, 0x04, 
+	  0x04, 0x04, 0x04, 0x01, 0x00, 0x2220e000, 0x22416000, 0x44419000,
+	  0x2220e000, 0x22416000, 0x44419000, 0x00 },
+	  
+ 	/* 1600x1200 @ 72 Hz */
+ 	{ 195000, 0x003f, 0x000e, 0x10, 0x0b, 0xC7, 0xC7, 0x8f, 0xd5, 0x0b,
+ 	  0xE1, 0x10, 0x40, 0xb0, 0x03, 0xAF, 0xC8, 0xaf, 0xe2, 0x04, 0x04,
+ 	  0x04, 0x04, 0x01, 0x00, 0x2220e000, 0x22416000, 0x44419000,
+ 	  0x2220e000, 0x22416000, 0x44419000, 0x00 }, 
+ 	  
+ 	/* 1600x1200 @ 75 Hz */
+ 	{ 202000, 0x0024, 0x0007, 0x10, 0x09, 0xC7, 0xC7, 0x8d, 0xcf, 0x07,
+ 	  0xE0, 0x10, 0x40, 0xb0, 0x03, 0xAF, 0xC8, 0xaf, 0xE1, 0x04, 0x04,
+ 	  0x04, 0x04, 0x01, 0x00, 0x2220e000, 0x22416000, 0x44419000,      
+ 	  0x2220e000, 0x22416000, 0x44419000,  0x00 },
+ 	  
+ 	/* 1600x1200 @ 85 Hz */
+	{ 229000, 0x0029, 0x0007, 0x10, 0x09, 0xC7, 0xC7, 0x8d, 0xcf, 0x07,
+	  0xE0, 0x10, 0x40, 0xb0, 0x03, 0xAF, 0xC8, 0xaf, 0xE1, 0x04, 0x04,
+	  0x04, 0x04, 0x01, 0x00, 0x22210000, 0x22416000, 0x0,
+	  0x22210000, 0x22416000, 0x0, 0x00 },
+};	 
+
+void round_off_xres(u32 *xres) 
+{
+	if (*xres <= 640)
+		*xres = 640;
+	else if (*xres <= 800)
+		*xres = 800;
+	else if (*xres <= 1024)
+		*xres = 1024;
+	else if (*xres <= 1152)
+		*xres = 1152;
+	else if (*xres <= 1280)
+		*xres = 1280;
+	else
+		*xres = 1600;
+}
+
+inline void round_off_yres(u32 *xres, u32 *yres)
+{
+	*yres = (*xres * 3) >> 2;
+}
+
+void i810fb_encode_registers(const struct fb_var_screenin