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authorThomas Abraham <thomas.abraham@linaro.org>2011-10-24 11:48:21 +0200
committerKukjin Kim <kgene.kim@samsung.com>2011-12-23 10:06:59 +0900
commit0dfb3b41be4ca3c9d1688f6c2d00bfa178356494 (patch)
treec0ea3c6ef69c90156016d8e9ec51cfa3c46226f9 /drivers/tty/serial/samsung.c
parent0cfb26e1fb9d7afe9c79a40a257808eafb2aff34 (diff)
serial: samsung: merge all SoC specific port reset functions
The port reset function in each of the platform specific extension performs the same operations and hence all the reset port functions can be merged into one and moved into the common samsung uart driver. The SoC specific port reset functions are removed from SoC extensions. Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'drivers/tty/serial/samsung.c')
-rw-r--r--drivers/tty/serial/samsung.c23
1 files changed, 18 insertions, 5 deletions
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index dc5a4edbc45..78aea1a49ad 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -965,16 +965,29 @@ static struct s3c24xx_uart_port s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS
/* s3c24xx_serial_resetport
*
- * wrapper to call the specific reset for this port (reset the fifos
- * and the settings)
+ * reset the fifos and other the settings.
*/
-static inline int s3c24xx_serial_resetport(struct uart_port *port,
- struct s3c2410_uartcfg *cfg)
+static void s3c24xx_serial_resetport(struct uart_port *port,
+ struct s3c2410_uartcfg *cfg)
{
struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
+ unsigned long ucon = rd_regl(port, S3C2410_UCON);
+ unsigned int ucon_mask;
- return (info->reset_port)(port, cfg);
+ ucon_mask = info->clksel_mask;
+ if (info->type == PORT_S3C2440)
+ ucon_mask |= S3C2440_UCON0_DIVMASK;
+
+ ucon &= ucon_mask;
+ wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
+
+ /* reset both fifos */
+ wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
+ wr_regl(port, S3C2410_UFCON, cfg->ufcon);
+
+ /* some delay is required after fifo reset */
+ udelay(1);
}