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authorJohn Crispin <blogic@openwrt.org>2013-01-25 19:39:51 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-01-30 00:15:34 -0500
commitc420811f117a59a4a7d4e34b362437b91c7fafa1 (patch)
treed7085982248f5347c65da5977a3dfd79eefb3ef6 /drivers/tty/serial/8250/8250.c
parent9fe8074b82ed14358be50c62ab9d081bcb911607 (diff)
serial: ralink: adds support for the serial core found on ralink wisoc
The MIPS based Ralink WiSoC platform has 1 or more 8250 compatible serial cores. To make them work we require the same quirks that are used by AU1x00. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/8250/8250.c')
-rw-r--r--drivers/tty/serial/8250/8250.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/tty/serial/8250/8250.c b/drivers/tty/serial/8250/8250.c
index 24939ca3eed..0efc815a496 100644
--- a/drivers/tty/serial/8250/8250.c
+++ b/drivers/tty/serial/8250/8250.c
@@ -317,9 +317,9 @@ static void default_serial_dl_write(struct uart_8250_port *up, int value)
serial_out(up, UART_DLM, value >> 8 & 0xff);
}
-#ifdef CONFIG_MIPS_ALCHEMY
+#if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
-/* Au1x00 UART hardware has a weird register layout */
+/* Au1x00/RT288x UART hardware has a weird register layout */
static const u8 au_io_in_map[] = {
[UART_RX] = 0,
[UART_IER] = 2,
@@ -440,7 +440,7 @@ static void set_io_from_upio(struct uart_port *p)
p->serial_out = mem32_serial_out;
break;
-#ifdef CONFIG_MIPS_ALCHEMY
+#if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
case UPIO_AU:
p->serial_in = au_serial_in;
p->serial_out = au_serial_out;