diff options
| author | Larry Finger <Larry.Finger@lwfinger.net> | 2010-02-19 12:02:44 -0600 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2010-02-19 15:52:51 -0500 |
| commit | ac5b4e168ebd9046a6cd066d50b3341353f2f309 (patch) | |
| tree | 2420840ac1887774ad756e51a7ae0df739aa9123 /drivers/ssb | |
| parent | d8728ee919282c7b01b65cd479ec1e2a9c5d3ba8 (diff) | |
ssb: Add PCI ID 0x4322 to PHU handling
Some of the N PHYs need a revision in the handling of the PMU.
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/ssb')
| -rw-r--r-- | drivers/ssb/driver_chipcommon_pmu.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/ssb/driver_chipcommon_pmu.c b/drivers/ssb/driver_chipcommon_pmu.c index 64abd11f6fb..3d551245a4e 100644 --- a/drivers/ssb/driver_chipcommon_pmu.c +++ b/drivers/ssb/driver_chipcommon_pmu.c @@ -332,6 +332,12 @@ static void ssb_pmu_pll_init(struct ssb_chipcommon *cc) case 0x5354: ssb_pmu0_pllinit_r0(cc, crystalfreq); break; + case 0x4322: + if (cc->pmu.rev == 2) { + chipco_write32(cc, SSB_CHIPCO_PLLCTL_ADDR, 0x0000000A); + chipco_write32(cc, SSB_CHIPCO_PLLCTL_DATA, 0x380005C0); + } + break; default: ssb_printk(KERN_ERR PFX "ERROR: PLL init unknown for device %04X\n", @@ -417,6 +423,7 @@ static void ssb_pmu_resources_init(struct ssb_chipcommon *cc) switch (bus->chip_id) { case 0x4312: + case 0x4322: /* We keep the default settings: * min_msk = 0xCBB * max_msk = 0x7FFFF |