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authorFeng Tang <feng.tang@intel.com>2010-01-20 13:49:45 -0700
committerGrant Likely <grant.likely@secretlab.ca>2010-01-20 13:49:45 -0700
commit552e450929a7298cc8834fd2824a60b2e914f70e (patch)
tree1b9568370d1b40f23dd4d73765e98ff74665eb07 /drivers/spi/dw_spi_pci.c
parent51f921c1eb1124fb99ab0728c19e8e14c82c81be (diff)
spi/dw_spi: refine the IRQ mode working flow
Now dw_spi core fully supports 3 transfer modes: pure polling, DMA and IRQ mode. IRQ mode will use the FIFO half empty as the IRQ trigger, so each interface driver need set the fifo_len, so that core driver can handle it properly Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/spi/dw_spi_pci.c')
-rw-r--r--drivers/spi/dw_spi_pci.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/dw_spi_pci.c b/drivers/spi/dw_spi_pci.c
index 7980f1443ce..1f0735f9cc7 100644
--- a/drivers/spi/dw_spi_pci.c
+++ b/drivers/spi/dw_spi_pci.c
@@ -73,6 +73,7 @@ static int __devinit spi_pci_probe(struct pci_dev *pdev,
dws->num_cs = 4;
dws->max_freq = 25000000; /* for Moorestwon */
dws->irq = pdev->irq;
+ dws->fifo_len = 40; /* FIFO has 40 words buffer */
ret = dw_spi_add_host(dws);
if (ret)