diff options
author | Dan Williams <dan.j.williams@intel.com> | 2011-05-10 02:28:45 -0700 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2011-07-03 04:04:47 -0700 |
commit | d35bc1bd18ab9e986cfb67c5a281a70cfd717f05 (patch) | |
tree | 2f02bc1a855f1ccc2f6201f5300d1d823d80c085 /drivers/scsi | |
parent | f1f52e75939b56c40b3d153ae99faf2720250242 (diff) |
isci: uplevel phy infrastructure
Merge core/scic_sds_phy.[ch] into phy.[ch]
Reported-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/scsi')
-rw-r--r-- | drivers/scsi/isci/Makefile | 1 | ||||
-rw-r--r-- | drivers/scsi/isci/core/scic_phy.h | 302 | ||||
-rw-r--r-- | drivers/scsi/isci/core/scic_port.h | 2 | ||||
-rw-r--r-- | drivers/scsi/isci/core/scic_sds_phy.c | 2277 | ||||
-rw-r--r-- | drivers/scsi/isci/core/scic_sds_phy.h | 439 | ||||
-rw-r--r-- | drivers/scsi/isci/core/scic_sds_port.c | 2 | ||||
-rw-r--r-- | drivers/scsi/isci/core/scic_sds_port_configuration_agent.h | 1 | ||||
-rw-r--r-- | drivers/scsi/isci/phy.c | 2213 | ||||
-rw-r--r-- | drivers/scsi/isci/phy.h | 574 | ||||
-rw-r--r-- | drivers/scsi/isci/port.c | 2 | ||||
-rw-r--r-- | drivers/scsi/isci/remote_device.c | 2 |
11 files changed, 2784 insertions, 3031 deletions
diff --git a/drivers/scsi/isci/Makefile b/drivers/scsi/isci/Makefile index a7d1eb33eca..2830a97a822 100644 --- a/drivers/scsi/isci/Makefile +++ b/drivers/scsi/isci/Makefile @@ -12,4 +12,3 @@ isci-objs := init.o phy.o request.o sata.o \ smp_request.o \ core/scic_sds_port.o \ core/scic_sds_port_configuration_agent.o \ - core/scic_sds_phy.o \ diff --git a/drivers/scsi/isci/core/scic_phy.h b/drivers/scsi/isci/core/scic_phy.h deleted file mode 100644 index f046b4af4b8..00000000000 --- a/drivers/scsi/isci/core/scic_phy.h +++ /dev/null @@ -1,302 +0,0 @@ -/* - * This file is provided under a dual BSD/GPLv2 license. When using or - * redistributing this file, you may do so under either license. - * - * GPL LICENSE SUMMARY - * - * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - * The full GNU General Public License is included in this distribution - * in the file called LICENSE.GPL. - * - * BSD LICENSE - * - * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _SCIC_PHY_H_ -#define _SCIC_PHY_H_ - -/** - * This file contains all of the interface methods that can be called by an - * SCIC user on a phy (SAS or SATA) object. - * - * - */ - - -#include <scsi/sas.h> -#include <scsi/libsas.h> - -struct scic_sds_phy; -struct scic_sds_port; - - -enum sas_linkrate sci_phy_linkrate(struct scic_sds_phy *sci_phy); - -struct scic_phy_cap { - union { - struct { - /* - * The SAS specification indicates the start bit shall - * always be set to - * 1. This implementation will have the start bit set - * to 0 if the PHY CAPABILITIES were either not - * received or speed negotiation failed. - */ - u8 start:1; - u8 tx_ssc_type:1; - u8 res1:2; - u8 req_logical_linkrate:4; - - u32 gen1_no_ssc:1; - u32 gen1_ssc:1; - u32 gen2_no_ssc:1; - u32 gen2_ssc:1; - u32 gen3_no_ssc:1; - u32 gen3_ssc:1; - u32 res2:17; - u32 parity:1; - }; - u32 all; - }; -} __packed; - -/* this data structure reflects the link layer transmit identification reg */ -struct scic_phy_proto { - union { - struct { - u16 _r_a:1; - u16 smp_iport:1; - u16 stp_iport:1; - u16 ssp_iport:1; - u16 _r_b:4; - u16 _r_c:1; - u16 smp_tport:1; - u16 stp_tport:1; - u16 ssp_tport:1; - u16 _r_d:4; - }; - u16 all; - }; -} __packed; - - -/** - * struct scic_phy_properties - This structure defines the properties common to - * all phys that can be retrieved. - * - * - */ -struct scic_phy_properties { - /** - * This field specifies the port that currently contains the - * supplied phy. This field may be set to NULL - * if the phy is not currently contained in a port. - */ - struct scic_sds_port *owning_port; - - /** - * This field specifies the link rate at which the phy is - * currently operating. - */ - enum sas_linkrate negotiated_link_rate; - - /** - * This field specifies the index of the phy in relation to other - * phys within the controller. This index is zero relative. - */ - u8 index; -}; - -/** - * struct scic_sas_phy_properties - This structure defines the properties, - * specific to a SAS phy, that can be retrieved. - * - * - */ -struct scic_sas_phy_properties { - /** - * This field delineates the Identify Address Frame received - * from the remote end point. - */ - struct sas_identify_frame rcvd_iaf; - - /** - * This field delineates the Phy capabilities structure received - * from the remote end point. - */ - struct scic_phy_cap rcvd_cap; - -}; - -/** - * struct scic_sata_phy_properties - This structure defines the properties, - * specific to a SATA phy, that can be retrieved. - * - * - */ -struct scic_sata_phy_properties { - /** - * This field delineates the signature FIS received from the - * attached target. - */ - struct dev_to_host_fis signature_fis; - - /** - * This field specifies to the user if a port selector is connected - * on the specified phy. - */ - bool is_port_selector_present; - -}; - -/** - * enum scic_phy_counter_id - This enumeration depicts the various pieces of - * optional information that can be retrieved for a specific phy. - * - * - */ -enum scic_phy_counter_id { - /** - * This PHY information field tracks the number of frames received. - */ - SCIC_PHY_COUNTER_RECEIVED_FRAME, - - /** - * This PHY information field tracks the number of frames transmitted. - */ - SCIC_PHY_COUNTER_TRANSMITTED_FRAME, - - /** - * This PHY information field tracks the number of DWORDs received. - */ - SCIC_PHY_COUNTER_RECEIVED_FRAME_WORD, - - /** - * This PHY information field tracks the number of DWORDs transmitted. - */ - SCIC_PHY_COUNTER_TRANSMITTED_FRAME_DWORD, - - /** - * This PHY information field tracks the number of times DWORD - * synchronization was lost. - */ - SCIC_PHY_COUNTER_LOSS_OF_SYNC_ERROR, - - /** - * This PHY information field tracks the number of received DWORDs with - * running disparity errors. - */ - SCIC_PHY_COUNTER_RECEIVED_DISPARITY_ERROR, - - /** - * This PHY information field tracks the number of received frames with a - * CRC error (not including short or truncated frames). - */ - SCIC_PHY_COUNTER_RECEIVED_FRAME_CRC_ERROR, - - /** - * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT) - * primitives received. - */ - SCIC_PHY_COUNTER_RECEIVED_DONE_ACK_NAK_TIMEOUT, - - /** - * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT) - * primitives transmitted. - */ - SCIC_PHY_COUNTER_TRANSMITTED_DONE_ACK_NAK_TIMEOUT, - - /** - * This PHY information field tracks the number of times the inactivity - * timer for connections on the phy has been utilized. - */ - SCIC_PHY_COUNTER_INACTIVITY_TIMER_EXPIRED, - - /** - * This PHY information field tracks the number of DONE (CREDIT TIMEOUT) - * primitives received. - */ - SCIC_PHY_COUNTER_RECEIVED_DONE_CREDIT_TIMEOUT, - - /** - * This PHY information field tracks the number of DONE (CREDIT TIMEOUT) - * primitives transmitted. - */ - SCIC_PHY_COUNTER_TRANSMITTED_DONE_CREDIT_TIMEOUT, - - /** - * This PHY information field tracks the number of CREDIT BLOCKED - * primitives received. - * @note Depending on remote device implementation, credit blocks - * may occur regularly. - */ - SCIC_PHY_COUNTER_RECEIVED_CREDIT_BLOCKED, - - /** - * This PHY information field contains the number of short frames - * received. A short frame is simply a frame smaller then what is - * allowed by either the SAS or SATA specification. - */ - SCIC_PHY_COUNTER_RECEIVED_SHORT_FRAME, - - /** - * This PHY information field contains the number of frames received after - * credit has been exhausted. - */ - SCIC_PHY_COUNTER_RECEIVED_FRAME_WITHOUT_CREDIT, - - /** - * This PHY information field contains the number of frames received after - * a DONE has been received. - */ - SCIC_PHY_COUNTER_RECEIVED_FRAME_AFTER_DONE, - - /** - * This PHY information field contains the number of times the phy - * failed to achieve DWORD synchronization during speed negotiation. - */ - SCIC_PHY_COUNTER_SN_DWORD_SYNC_ERROR -}; - -#endif /* _SCIC_PHY_H_ */ diff --git a/drivers/scsi/isci/core/scic_port.h b/drivers/scsi/isci/core/scic_port.h index 51e7eede5c8..431dbd2093f 100644 --- a/drivers/scsi/isci/core/scic_port.h +++ b/drivers/scsi/isci/core/scic_port.h @@ -58,7 +58,7 @@ #include "isci.h" #include "sas.h" -#include "scic_phy.h" +#include "phy.h" struct scic_sds_port; diff --git a/drivers/scsi/isci/core/scic_sds_phy.c b/drivers/scsi/isci/core/scic_sds_phy.c deleted file mode 100644 index 150509b0c69..00000000000 --- a/drivers/scsi/isci/core/scic_sds_phy.c +++ /dev/null @@ -1,2277 +0,0 @@ -/* - * This file is provided under a dual BSD/GPLv2 license. When using or - * redistributing this file, you may do so under either license. - * - * GPL LICENSE SUMMARY - * - * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - * The full GNU General Public License is included in this distribution - * in the file called LICENSE.GPL. - * - * BSD LICENSE - * - * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include <scsi/sas.h> -#include "sas.h" -#include "host.h" -#include "state_machine.h" -#include "scic_phy.h" -#include "scic_sds_phy.h" -#include "scic_sds_port.h" -#include "remote_node_context.h" -#include "scu_event_codes.h" -#include "timers.h" - -#define SCIC_SDS_PHY_MIN_TIMER_COUNT (SCI_MAX_PHYS) -#define SCIC_SDS_PHY_MAX_TIMER_COUNT (SCI_MAX_PHYS) - -/* Maximum arbitration wait time in micro-seconds */ -#define SCIC_SDS_PHY_MAX_ARBITRATION_WAIT_TIME (700) - -enum sas_linkrate sci_phy_linkrate(struct scic_sds_phy *sci_phy) -{ - return sci_phy->max_negotiated_speed; -} - -/* - * ***************************************************************************** - * * SCIC SDS PHY Internal Methods - * ***************************************************************************** */ - -/** - * This method will initialize the phy transport layer registers - * @sci_phy: - * @transport_layer_registers - * - * enum sci_status - */ -static enum sci_status scic_sds_phy_transport_layer_initialization( - struct scic_sds_phy *sci_phy, - struct scu_transport_layer_registers __iomem *transport_layer_registers) -{ - u32 tl_control; - - sci_phy->transport_layer_registers = transport_layer_registers; - - writel(SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX, - &sci_phy->transport_layer_registers->stp_rni); - - /* - * Hardware team recommends that we enable the STP prefetch for all - * transports - */ - tl_control = readl(&sci_phy->transport_layer_registers->control); - tl_control |= SCU_TLCR_GEN_BIT(STP_WRITE_DATA_PREFETCH); - writel(tl_control, &sci_phy->transport_layer_registers->control); - - return SCI_SUCCESS; -} - -/** - * This method will initialize the phy link layer registers - * @sci_phy: - * @link_layer_registers: - * - * enum sci_status - */ -static enum sci_status -scic_sds_phy_link_layer_initialization(struct scic_sds_phy *sci_phy, - struct scu_link_layer_registers __iomem *link_layer_registers) -{ - struct scic_sds_controller *scic = - sci_phy->owning_port->owning_controller; - int phy_idx = sci_phy->phy_index; - struct sci_phy_user_params *phy_user = - &scic->user_parameters.sds1.phys[phy_idx]; - struct sci_phy_oem_params *phy_oem = - &scic->oem_parameters.sds1.phys[phy_idx]; - u32 phy_configuration; - struct scic_phy_cap phy_cap; - u32 parity_check = 0; - u32 parity_count = 0; - u32 llctl, link_rate; - u32 clksm_value = 0; - - sci_phy->link_layer_registers = link_layer_registers; - - /* Set our IDENTIFY frame data */ - #define SCI_END_DEVICE 0x01 - - writel(SCU_SAS_TIID_GEN_BIT(SMP_INITIATOR) | - SCU_SAS_TIID_GEN_BIT(SSP_INITIATOR) | - SCU_SAS_TIID_GEN_BIT(STP_INITIATOR) | - SCU_SAS_TIID_GEN_BIT(DA_SATA_HOST) | - SCU_SAS_TIID_GEN_VAL(DEVICE_TYPE, SCI_END_DEVICE), - &sci_phy->link_layer_registers->transmit_identification); - - /* Write the device SAS Address */ - writel(0xFEDCBA98, - &sci_phy->link_layer_registers->sas_device_name_high); - writel(phy_idx, &sci_phy->link_layer_registers->sas_device_name_low); - - /* Write the source SAS Address */ - writel(phy_oem->sas_address.high, - &sci_phy->link_layer_registers->source_sas_address_high); - writel(phy_oem->sas_address.low, - &sci_phy->link_layer_registers->source_sas_address_low); - - /* Clear and Set the PHY Identifier */ - writel(0, &sci_phy->link_layer_registers->identify_frame_phy_id); - writel(SCU_SAS_TIPID_GEN_VALUE(ID, phy_idx), - &sci_phy->link_layer_registers->identify_frame_phy_id); - - /* Change the initial state of the phy configuration register */ - phy_configuration = - readl(&sci_phy->link_layer_registers->phy_configuration); - - /* Hold OOB state machine in reset */ - phy_configuration |= SCU_SAS_PCFG_GEN_BIT(OOB_RESET); - writel(phy_configuration, - &sci_phy->link_layer_registers->phy_configuration); - - /* Configure the SNW capabilities */ - phy_cap.all = 0; - phy_cap.start = 1; - phy_cap.gen3_no_ssc = 1; - phy_cap.gen2_no_ssc = 1; - phy_cap.gen1_no_ssc = 1; - if (scic->oem_parameters.sds1.controller.do_enable_ssc == true) { - phy_cap.gen3_ssc = 1; - phy_cap.gen2_ssc = 1; - phy_cap.gen1_ssc = 1; - } - - /* - * The SAS specification indicates that the phy_capabilities that - * are transmitted shall have an even parity. Calculate the parity. */ - parity_check = phy_cap.all; - while (parity_check != 0) { - if (parity_check & 0x1) - parity_count++; - parity_check >>= 1; - } - - /* - * If parity indicates there are an odd number of bits set, then - * set the parity bit to 1 in the phy capabilities. */ - if ((parity_count % 2) != 0) - phy_cap.parity = 1; - - writel(phy_cap.all, &sci_phy->link_layer_registers->phy_capabilities); - - /* Set the enable spinup period but disable the ability to send - * notify enable spinup - */ - writel(SCU_ENSPINUP_GEN_VAL(COUNT, - phy_user->notify_enable_spin_up_insertion_frequency), - &sci_phy->link_layer_registers->notify_enable_spinup_control); - - /* Write the ALIGN Insertion Ferequency for connected phy and - * inpendent of connected state - */ - clksm_value = SCU_ALIGN_INSERTION_FREQUENCY_GEN_VAL(CONNECTED, - phy_user->in_connection_align_insertion_frequency); - - clksm_value |= SCU_ALIGN_INSERTION_FREQUENCY_GEN_VAL(GENERAL, - phy_user->align_insertion_frequency); - - writel(clksm_value, &sci_phy->link_layer_registers->clock_skew_management); - - /* @todo Provide a way to write this register correctly */ - writel(0x02108421, - &sci_phy->link_layer_registers->afe_lookup_table_control); - - llctl = SCU_SAS_LLCTL_GEN_VAL(NO_OUTBOUND_TASK_TIMEOUT, - (u8)scic->user_parameters.sds1.no_outbound_task_timeout); - - switch(phy_user->max_speed_generation) { - case SCIC_SDS_PARM_GEN3_SPEED: - link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN3; - break; - case SCIC_SDS_PARM_GEN2_SPEED: - link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN2; - break; - default: - link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN1; - break; - } - llctl |= SCU_SAS_LLCTL_GEN_VAL(MAX_LINK_RATE, link_rate); - writel(llctl, &sci_phy->link_layer_registers->link_layer_control); - - if (is_a0() || is_a2()) { - /* Program the max ARB time for the PHY to 700us so we inter-operate with - * the PMC expander which shuts down PHYs if the expander PHY generates too - * many breaks. This time value will guarantee that the initiator PHY will - * generate the break. - */ - writel(SCIC_SDS_PHY_MAX_ARBITRATION_WAIT_TIME, - &sci_phy->link_layer_registers->maximum_arbitration_wait_timer_timeout); - } - - /* - * Set the link layer hang detection to 500ms (0x1F4) from its default - * value of 128ms. Max value is 511 ms. - */ - writel(0x1F4, &sci_phy->link_layer_registers->link_layer_hang_detection_timeout); - - /* We can exit the initial state to the stopped state */ - sci_base_state_machine_change_state(&sci_phy->state_machine, - SCI_BASE_PHY_STATE_STOPPED); - - return SCI_SUCCESS; -} - -/** - * This function will handle the sata SIGNATURE FIS timeout condition. It will - * restart the starting substate machine since we dont know what has actually - * happening. - */ -static void scic_sds_phy_sata_timeout(void *phy) -{ - struct scic_sds_phy *sci_phy = phy; - - dev_dbg(sciphy_to_dev(sci_phy), - "%s: SCIC SDS Phy 0x%p did not receive signature fis before " - "timeout.\n", - __func__, - sci_phy); - - sci_base_state_machine_stop(&sci_phy->starting_substate_machine); - - sci_base_state_machine_change_state(&sci_phy->state_machine, - SCI_BASE_PHY_STATE_STARTING); -} - -/** - * This method returns the port currently containing this phy. If the phy is - * currently contained by the dummy port, then the phy is considered to not - * be part of a port. - * @sci_phy: This parameter specifies the phy for which to retrieve the - * containing port. - * - * This method returns a handle to a port that contains the supplied phy. - * NULL This value is returned if the phy is not part of a real - * port (i.e. it's contained in the dummy port). !NULL All other - * values indicate a handle/pointer to the port containing the phy. - */ -struct scic_sds_port *scic_sds_phy_get_port( - struct scic_sds_phy *sci_phy) -{ - if (scic_sds_port_get_index(sci_phy->owning_port) == SCIC_SDS_DUMMY_PORT) - return NULL; - - return sci_phy->owning_port; -} - -/** - * This method will assign a port to the phy object. - * @out]: sci_phy This parameter specifies the phy for which to assign a port - * object. - * - * - */ -void scic_sds_phy_set_port( - struct scic_sds_phy *sci_phy, - struct scic_sds_port *sci_port) -{ - sci_phy->owning_port = sci_port; - - if (sci_phy->bcn_received_while_port_unassigned) { - sci_phy->bcn_received_while_port_unassigned = false; - scic_sds_port_broadcast_change_received(sci_phy->owning_port, sci_phy); - } -} - -/** - * This method will initialize the constructed phy - * @sci_phy: - * @link_layer_registers: - * - * enum sci_status - */ -enum sci_status scic_sds_phy_initialize( - struct scic_sds_phy *sci_phy, - struct scu_transport_layer_registers __iomem *transport_layer_registers, - struct scu_link_layer_registers __iomem *link_layer_registers) -{ - struct scic_sds_controller *scic = scic_sds_phy_get_controller(sci_phy); - struct isci_host *ihost = scic_to_ihost(scic); - - /* Create the SIGNATURE FIS Timeout timer for this phy */ - sci_phy->sata_timeout_timer = - isci_timer_create( - ihost, - sci_phy, - scic_sds_phy_sata_timeout); - - /* Perfrom the initialization of the TL hardware */ - scic_sds_phy_transport_layer_initialization( - sci_phy, - transport_layer_registers); - - /* Perofrm the initialization of the PE hardware */ - scic_sds_phy_link_layer_initialization(sci_phy, link_layer_registers); - - /* - * There is nothing that needs to be done in this state just - * transition to the stopped state. */ - sci_base_state_machine_change_state(&sci_phy->state_machine, - SCI_BASE_PHY_STATE_STOPPED); - - return SCI_SUCCESS; -} - -/** - * This method assigns the direct attached device ID for this phy. - * - * @sci_phy The phy for which the direct attached device id is to - * be assigned. - * @device_id The direct attached device ID to assign to the phy. - * This will either be the RNi for the device or an invalid RNi if there - * is no current device assigned to the phy. - */ -void scic_sds_phy_setup_transport( - struct scic_sds_phy *sci_phy, - u32 device_id) -{ - u32 tl_control; - - writel(device_id, &sci_phy->transport_layer_registers->stp_rni); - - /* - * The read should guarantee that the first write gets posted - * before the next write - */ - tl_control = readl(&sci_phy->transport_layer_registers->control); - tl_control |= SCU_TLCR_GEN_BIT(CLEAR_TCI_NCQ_MAPPING_TABLE); - writel(tl_control, &sci_phy->transport_layer_registers->control); -} - -/** - * - * @sci_phy: The phy object to be suspended. - * - * This function will perform the register reads/writes to suspend the SCU - * hardware protocol engine. none - */ -static void scic_sds_phy_suspend( - struct scic_sds_phy *sci_phy) -{ - u32 scu_sas_pcfg_value; - - scu_sas_pcfg_value = - readl(&sci_phy->link_layer_registers->phy_configuration); - scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE); - writel(scu_sas_pcfg_value, - &sci_phy->link_layer_registers->phy_configuration); - - scic_sds_phy_setup_transport( - sci_phy, - SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX); -} - -void scic_sds_phy_resume(struct scic_sds_phy *sci_phy) -{ - u32 scu_sas_pcfg_value; - - scu_sas_pcfg_value = - readl(&sci_phy->link_layer_registers->phy_configuration); - scu_sas_pcfg_value &= ~SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE); - writel(scu_sas_pcfg_value, - &sci_phy->link_layer_registers->phy_configuration); -} - -void scic_sds_phy_get_sas_address(struct scic_sds_phy *sci_phy, - struct sci_sas_address *sas_address) -{ - sas_address->high = readl(&sci_phy->link_layer_registers->source_sas_address_high); - sas_address->low = readl(&sci_phy->link_layer_registers->source_sas_address_low); -} - -void scic_sds_phy_get_attached_sas_address(struct scic_sds_phy *sci_phy, - struct sci_sas_address *sas_address) -{ - struct sas_identify_frame *iaf; - struct isci_phy *iphy = sci_phy_to_iphy(sci_phy); - - iaf = &iphy->frame_rcvd.iaf; - memcpy(sas_address, iaf->sas_addr, SAS_ADDR_SIZE); -} - -void scic_sds_phy_get_protocols(struct scic_sds_phy *sci_phy, - struct scic_phy_proto *protocols) -{ - protocols->all = - (u16)(readl(&sci_phy-> - link_layer_registers->transmit_identification) & - 0x0000FFFF); -} - -/** - * This method will attempt to start the phy object. This request is only valid - * when the phy is in the stopped state - * @sci_phy: - * - * enum sci_status - */ -enum sci_status scic_sds_phy_start(struct scic_sds_phy *sci_phy) -{ - return sci_phy->state_handlers->start_handler(sci_phy); -} - -/** - * This method will attempt to stop the phy object. - * @sci_phy: - * - * enum sci_status SCI_SUCCESS if the phy is going to stop SCI_INVALID_STATE - * if the phy is not in a valid state to stop - */ -enum sci_status scic_sds_phy_stop(struct scic_sds_phy *sci_phy) -{ - return sci_phy->state_handlers->stop_handler(sci_phy); -} - -/** - * This method will attempt to reset the phy. This request is only valid when - * the phy is in an ready state - * @sci_phy: - * - * enum sci_status - */ -enum sci_status scic_sds_phy_reset( - struct scic_sds_phy *sci_phy) -{ - return sci_phy->state_handlers->reset_handler(sci_phy); -} - -/** - * This method will process the event code received. - * @sci_phy: - * @event_code: - * - * enum sci_status - */ -enum sci_status scic_sds_phy_event_handler( - struct scic_sds_phy *sci_phy, - u32 event_code) -{ - return sci_phy->state_handlers->event_handler(sci_phy, event_code); -} - -/** - * This method will process the frame index received. - * @sci_phy: - * @frame_index: - * - * enum sci_status - */ -enum sci_status scic_sds_phy_frame_handler( - struct scic_sds_phy *sci_phy, - u32 frame_index) -{ - return sci_phy->state_handlers->frame_handler(sci_phy, frame_index); -} - -/** - * This method will give the phy permission to consume power - * @sci_phy: - * - * enum sci_status - */ -enum sci_status scic_sds_phy_consume_power_handler( - struct scic_sds_phy *sci_phy) -{ - return sci_phy->state_handlers->consume_power_handler(sci_phy); -} - -/* - * ***************************************************************************** - * * SCIC SDS PHY HELPER FUNCTIONS - * ***************************************************************************** */ - - -/** - * - * @sci_phy: The phy object that received SAS PHY DETECTED. - * - * This method continues the link training for the phy as if it were a SAS PHY - * instead of a SATA PHY. This is done because the completion queue had a SAS - * PHY DETECTED event when the state machine was expecting a SATA PHY event. - * none - */ -static void scic_sds_phy_start_sas_link_training( - struct scic_sds_phy *sci_phy) -{ - u32 phy_control; - - phy_control = - readl(&sci_phy->link_layer_registers->phy_configuration); - phy_control |= SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD); - writel(phy_control, - &sci_phy->link_layer_registers->phy_configuration); - - sci_base_state_machine_change_state( - &sci_phy->starting_substate_machine, - SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SAS_SPEED_EN - ); - - sci_phy->protocol = SCIC_SDS_PHY_PROTOCOL_SAS; -} - -/** - * - * @sci_phy: The phy object that received a SATA SPINUP HOLD event - * - * This method continues the link training for the phy as if it were a SATA PHY - * instead of a SAS PHY. This is done because the completion queue had a SATA - * SPINUP HOLD event when the state machine was expecting a SAS PHY event. none - */ -static void scic_sds_phy_start_sata_link_training( - struct scic_sds_phy *sci_phy) -{ - sci_base_state_machine_change_state( - &sci_phy->starting_substate_machine, - SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_POWER - ); - - sci_phy->protocol = SCIC_SDS_PHY_PROTOCOL_SATA; -} - -/** - * scic_sds_phy_complete_link_training - perform processing common to - * all protocols upon completion of link training. - * @sci_phy: This parameter specifies the phy object for which link training - * has completed. - * @max_link_rate: This parameter specifies the maximum link rate to be - * associated with this phy. - * @next_state: This parameter specifies the next state for the phy's starting - * sub-state machine. - * - */ -static void scic_sds_phy_complete_link_training( - struct scic_sds_phy *sci_phy, - enum sas_linkrate max_link_rate, - u32 next_state) -{ - sci_phy->max_negotiated_speed = max_link_rate; - - sci_base_state_machine_change_state(&sci_phy->starting_substate_machine, - next_state); -} - -static void scic_sds_phy_restart_starting_state( - struct scic_sds_phy *sci_phy) -{ - /* Stop the current substate machine */ - sci_base_state_machine_stop(&sci_phy->starting_substate_machine); - - /* Re-enter the base state machine starting state */ - sci_base_state_machine_change_state(&sci_phy->state_machine, - SCI_BASE_PHY_STATE_STARTING); -} - -/* **************************************************************************** - * SCIC SDS PHY general handlers - ************************************************************************** */ -static enum sci_status scic_sds_phy_starting_substate_general_stop_handler( - struct scic_sds_phy *phy) -{ - sci_base_state_machine_stop(&phy->starting_substate_machine); - - sci_base_state_machine_change_state(&phy->state_machine, - SCI_BASE_PHY_STATE_STOPPED); - - return SCI_SUCCESS; -} - -/* - * ***************************************************************************** - * * SCIC SDS PHY EVENT_HANDLERS - * ***************************************************************************** */ - -/** - * - * @phy: This struct scic_sds_phy object which has received an event. - * @event_code: This is the event code which the phy object is to decode. - * - * This method is called when an event notification is received for the phy - * object when in the state SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SPEED_EN. - - * decode the event - sas phy detected causes a state transition to the wait - * for speed event notification. - any other events log a warning message and - * set a failure status enum sci_status SCI_SUCCESS on any valid event notification - * SCI_FAILURE on any unexpected event notifation - */ -static enum sci_status scic_sds_phy_starting_substate_await_ossp_event_handler( - struct scic_sds_phy *sci_phy, - u32 event_code) -{ - u32 result = SCI_SUCCESS; - - switch (scu_get_event_code(event_code)) { - case SCU_EVENT_SAS_PHY_DETECTED: - scic_sds_phy_start_sas_link_training(sci_phy); - sci_phy->is_in_link_training = true; - break; - - case SCU_EVENT_SATA_SPINUP_HOLD: - scic_sds_phy_start_sata_link_training(sci_phy); - sci_phy->is_in_link_training = true; - break; - - default: - dev_dbg(scip |