diff options
author | Alan Cox <alan@lxorguk.ukuu.org.uk> | 2007-05-21 15:06:43 +0100 |
---|---|---|
committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2007-05-22 11:08:56 -0500 |
commit | 72d39fea9017bbb1407620bf89dfe8d1fb658e35 (patch) | |
tree | d7c87e09fd0d59bc50c8d31df07666213fa1eeab /drivers/scsi/initio.c | |
parent | 9d399cc7feac3faf66768566e04e16c750aad25f (diff) |
[SCSI] initio: Convert into a real Linux driver and update to modern style
This is a mix of a grand clean up I did and a reworking of the hotplug
support by Christoph. In testing it works as well as the previous code
did (that is -quite badly-) but we can now read it and as it settles in
actually debug the long standing problems it shares with the old driver.
Signed-off-by: Alan Cox <alan@redhat.com>
From Christoph:
removal of the BSD license is also fine with me, but should really
get a mention in the changelog aswell.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers/scsi/initio.c')
-rw-r--r-- | drivers/scsi/initio.c | 3823 |
1 files changed, 1833 insertions, 1990 deletions
diff --git a/drivers/scsi/initio.c b/drivers/scsi/initio.c index 7e7635ca78f..65ca1424954 100644 --- a/drivers/scsi/initio.c +++ b/drivers/scsi/initio.c @@ -3,7 +3,8 @@ * * Copyright (c) 1994-1998 Initio Corporation * Copyright (c) 1998 Bas Vermeulen <bvermeul@blackstar.xs4all.nl> - * All rights reserved. + * Copyright (c) 2004 Christoph Hellwig <hch@lst.de> + * Copyright (c) 2007 Red Hat <alan@redhat.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -19,38 +20,6 @@ * along with this program; see the file COPYING. If not, write to * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. * - * -------------------------------------------------------------------------- - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * Where this Software is combined with software released under the terms of - * the GNU General Public License ("GPL") and the terms of the GPL would require the - * combined work to also be released under the terms of the GPL, the terms - * and conditions of this License will apply in addition to those of the - * GPL with the exception of any terms or conditions of this License that - * conflict with, or are expressly prohibited by, the GPL. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. * ************************************************************************* * @@ -70,14 +39,14 @@ * - Fix memory allocation problem * 03/04/98 hc - v1.01l * - Fix tape rewind which will hang the system problem - * - Set can_queue to tul_num_scb + * - Set can_queue to initio_num_scb * 06/25/98 hc - v1.01m * - Get it work for kernel version >= 2.1.75 - * - Dynamic assign SCSI bus reset holding time in init_tulip() + * - Dynamic assign SCSI bus reset holding time in initio_init() * 07/02/98 hc - v1.01n * - Support 0002134A * 08/07/98 hc - v1.01o - * - Change the tul_abort_srb routine to use scsi_done. <01> + * - Change the initio_abort_srb routine to use scsi_done. <01> * 09/07/98 hl - v1.02 * - Change the INI9100U define and proc_dir_entry to * reflect the newer Kernel 2.1.118, but the v1.o1o @@ -150,23 +119,13 @@ static unsigned int i91u_debug = DEBUG_DEFAULT; #endif -#define TUL_RDWORD(x,y) (short)(inl((int)((ULONG)((ULONG)x+(UCHAR)y)) )) - -typedef struct PCI_ID_Struc { - unsigned short vendor_id; - unsigned short device_id; -} PCI_ID; - -static int tul_num_ch = 4; /* Maximum 4 adapters */ -static int tul_num_scb; -static int tul_tag_enable = 1; -static SCB *tul_scb; +static int initio_tag_enable = 1; #ifdef DEBUG_i91u static int setup_debug = 0; #endif -static void i91uSCBPost(BYTE * pHcb, BYTE * pScb); +static void i91uSCBPost(u8 * pHcb, u8 * pScb); /* PCI Devices supported by this driver */ static struct pci_device_id i91u_pci_devices[] = { @@ -184,74 +143,66 @@ MODULE_DEVICE_TABLE(pci, i91u_pci_devices); #define DEBUG_STATE 0 #define INT_DISC 0 -/*--- external functions --*/ -static void tul_se2_wait(void); - -/*--- forward refrence ---*/ -static SCB *tul_find_busy_scb(HCS * pCurHcb, WORD tarlun); -static SCB *tul_find_done_scb(HCS * pCurHcb); - -static int tulip_main(HCS * pCurHcb); - -static int tul_next_state(HCS * pCurHcb); -static int tul_state_1(HCS * pCurHcb); -static int tul_state_2(HCS * pCurHcb); -static int tul_state_3(HCS * pCurHcb); -static int tul_state_4(HCS * pCurHcb); -static int tul_state_5(HCS * pCurHcb); -static int tul_state_6(HCS * pCurHcb); -static int tul_state_7(HCS * pCurHcb); -static int tul_xfer_data_in(HCS * pCurHcb); -static int tul_xfer_data_out(HCS * pCurHcb); -static int tul_xpad_in(HCS * pCurHcb); -static int tul_xpad_out(HCS * pCurHcb); -static int tul_status_msg(HCS * pCurHcb); - -static int tul_msgin(HCS * pCurHcb); -static int tul_msgin_sync(HCS * pCurHcb); -static int tul_msgin_accept(HCS * pCurHcb); -static int tul_msgout_reject(HCS * pCurHcb); -static int tul_msgin_extend(HCS * pCurHcb); - -static int tul_msgout_ide(HCS * pCurHcb); -static int tul_msgout_abort_targ(HCS * pCurHcb); -static int tul_msgout_abort_tag(HCS * pCurHcb); - -static int tul_bus_device_reset(HCS * pCurHcb); -static void tul_select_atn(HCS * pCurHcb, SCB * pCurScb); -static void tul_select_atn3(HCS * pCurHcb, SCB * pCurScb); -static void tul_select_atn_stop(HCS * pCurHcb, SCB * pCurScb); -static int int_tul_busfree(HCS * pCurHcb); -static int int_tul_scsi_rst(HCS * pCurHcb); -static int int_tul_bad_seq(HCS * pCurHcb); -static int int_tul_resel(HCS * pCurHcb); -static int tul_sync_done(HCS * pCurHcb); -static int wdtr_done(HCS * pCurHcb); -static int wait_tulip(HCS * pCurHcb); -static int tul_wait_done_disc(HCS * pCurHcb); -static int tul_wait_disc(HCS * pCurHcb); -static void tulip_scsi(HCS * pCurHcb); -static int tul_post_scsi_rst(HCS * pCurHcb); - -static void tul_se2_ew_en(WORD CurBase); -static void tul_se2_ew_ds(WORD CurBase); -static int tul_se2_rd_all(WORD CurBase); -static void tul_se2_update_all(WORD CurBase); /* setup default pattern */ -static void tul_read_eeprom(WORD CurBase); - - /* ---- INTERNAL VARIABLES ---- */ -static HCS tul_hcs[MAX_SUPPORTED_ADAPTERS]; -static INI_ADPT_STRUCT i91u_adpt[MAX_SUPPORTED_ADAPTERS]; - -/*NVRAM nvram, *nvramp = &nvram; */ +/*--- forward references ---*/ +static struct scsi_ctrl_blk *initio_find_busy_scb(struct initio_host * host, u16 tarlun); +static struct scsi_ctrl_blk *initio_find_done_scb(struct initio_host * host); + +static int tulip_main(struct initio_host * host); + +static int initio_next_state(struct initio_host * host); +static int initio_state_1(struct initio_host * host); +static int initio_state_2(struct initio_host * host); +static int initio_state_3(struct initio_host * host); +static int initio_state_4(struct initio_host * host); +static int initio_state_5(struct initio_host * host); +static int initio_state_6(struct initio_host * host); +static int initio_state_7(struct initio_host * host); +static int initio_xfer_data_in(struct initio_host * host); +static int initio_xfer_data_out(struct initio_host * host); +static int initio_xpad_in(struct initio_host * host); +static int initio_xpad_out(struct initio_host * host); +static int initio_status_msg(struct initio_host * host); + +static int initio_msgin(struct initio_host * host); +static int initio_msgin_sync(struct initio_host * host); +static int initio_msgin_accept(struct initio_host * host); +static int initio_msgout_reject(struct initio_host * host); +static int initio_msgin_extend(struct initio_host * host); + +static int initio_msgout_ide(struct initio_host * host); +static int initio_msgout_abort_targ(struct initio_host * host); +static int initio_msgout_abort_tag(struct initio_host * host); + +static int initio_bus_device_reset(struct initio_host * host); +static void initio_select_atn(struct initio_host * host, struct scsi_ctrl_blk * scb); +static void initio_select_atn3(struct initio_host * host, struct scsi_ctrl_blk * scb); +static void initio_select_atn_stop(struct initio_host * host, struct scsi_ctrl_blk * scb); +static int int_initio_busfree(struct initio_host * host); +static int int_initio_scsi_rst(struct initio_host * host); +static int int_initio_bad_seq(struct initio_host * host); +static int int_initio_resel(struct initio_host * host); +static int initio_sync_done(struct initio_host * host); +static int wdtr_done(struct initio_host * host); +static int wait_tulip(struct initio_host * host); +static int initio_wait_done_disc(struct initio_host * host); +static int initio_wait_disc(struct initio_host * host); +static void tulip_scsi(struct initio_host * host); +static int initio_post_scsi_rst(struct initio_host * host); + +static void initio_se2_ew_en(unsigned long base); +static void initio_se2_ew_ds(unsigned long base); +static int initio_se2_rd_all(unsigned long base); +static void initio_se2_update_all(unsigned long base); /* setup default pattern */ +static void initio_read_eeprom(unsigned long base); + +/* ---- INTERNAL VARIABLES ---- */ + static NVRAM i91unvram; static NVRAM *i91unvramp; - - -static UCHAR i91udftNvRam[64] = +static u8 i91udftNvRam[64] = { -/*----------- header -----------*/ + /*----------- header -----------*/ 0x25, 0xc9, /* Signature */ 0x40, /* Size */ 0x01, /* Revision */ @@ -289,7 +240,7 @@ static UCHAR i91udftNvRam[64] = 0, 0}; /* - CheckSum - */ -static UCHAR tul_rate_tbl[8] = /* fast 20 */ +static u8 initio_rate_tbl[8] = /* fast 20 */ { /* nanosecond devide by 4 */ 12, /* 50ns, 20M */ @@ -302,53 +253,17 @@ static UCHAR tul_rate_tbl[8] = /* fast 20 */ 62 /* 250ns, 4M */ }; -static void tul_do_pause(unsigned amount) -{ /* Pause for amount jiffies */ +static void initio_do_pause(unsigned amount) +{ + /* Pause for amount jiffies */ unsigned long the_time = jiffies + amount; - while (time_before_eq(jiffies, the_time)); + while (time_before_eq(jiffies, the_time)) + cpu_relax(); } /*-- forward reference --*/ -/******************************************************************* - Use memeory refresh time ~ 15us * 2 -********************************************************************/ -void tul_se2_wait(void) -{ -#if 1 - udelay(30); -#else - UCHAR readByte; - - readByte = TUL_RD(0, 0x61); - if ((readByte & 0x10) == 0x10) { - for (;;) { - readByte = TUL_RD(0, 0x61); - if ((readByte & 0x10) == 0x10) - break; - } - for (;;) { - readByte = TUL_RD(0, 0x61); - if ((readByte & 0x10) != 0x10) - break; - } - } else { - for (;;) { - readByte = TUL_RD(0, 0x61); - if ((readByte & 0x10) == 0x10) - break; - } - for (;;) { - readByte = TUL_RD(0, 0x61); - if ((readByte & 0x10) != 0x10) - break; - } - } -#endif -} - - /****************************************************************** Input: instruction for Serial E2PROM @@ -379,1174 +294,1019 @@ void tul_se2_wait(void) ******************************************************************/ -static void tul_se2_instr(WORD CurBase, UCHAR instr) + +/** + * initio_se2_instr - bitbang an instruction + * @base: Base of InitIO controller + * @instr: Instruction for serial E2PROM + * + * Bitbang an instruction out to the serial E2Prom + */ + +static void initio_se2_instr(unsigned long base, u8 instr) { int i; - UCHAR b; + u8 b; - TUL_WR(CurBase + TUL_NVRAM, SE2CS | SE2DO); /* cs+start bit */ - tul_se2_wait(); - TUL_WR(CurBase + TUL_NVRAM, SE2CS | SE2CLK | SE2DO); /* +CLK */ - tul_se2_wait(); + outb(SE2CS | SE2DO, base + TUL_NVRAM); /* cs+start bit */ + udelay(30); + outb(SE2CS | SE2CLK | SE2DO, base + TUL_NVRAM); /* +CLK */ + udelay(30); for (i = 0; i < 8; i++) { if (instr & 0x80) - b = SE2CS | SE2DO; /* -CLK+dataBit */ + b = SE2CS | SE2DO; /* -CLK+dataBit */ else - b = SE2CS; /* -CLK */ - TUL_WR(CurBase + TUL_NVRAM, b); - tul_se2_wait(); - TUL_WR(CurBase + TUL_NVRAM, b | SE2CLK); /* +CLK */ - tul_se2_wait(); + b = SE2CS; /* -CLK */ + outb(b, base + TUL_NVRAM); + udelay(30); + outb(b | SE2CLK, base + TUL_NVRAM); /* +CLK */ + udelay(30); instr <<= 1; } - TUL_WR(CurBase + TUL_NVRAM, SE2CS); /* -CLK */ - tul_se2_wait(); - return; + outb(SE2CS, base + TUL_NVRAM); /* -CLK */ + udelay(30); } -/****************************************************************** - Function name : tul_se2_ew_en - Description : Enable erase/write state of serial EEPROM -******************************************************************/ -void tul_se2_ew_en(WORD CurBase) +/** + * initio_se2_ew_en - Enable erase/write + * @base: Base address of InitIO controller + * + * Enable erase/write state of serial EEPROM + */ +void initio_se2_ew_en(unsigned long base) { - tul_se2_instr(CurBase, 0x30); /* EWEN */ - TUL_WR(CurBase + TUL_NVRAM, 0); /* -CS */ - tul_se2_wait(); - return; + initio_se2_instr(base, 0x30); /* EWEN */ + outb(0, base + TUL_NVRAM); /* -CS */ + udelay(30); } -/************************************************************************ - Disable erase/write state of serial EEPROM -*************************************************************************/ -void tul_se2_ew_ds(WORD CurBase) +/** + * initio_se2_ew_ds - Disable erase/write + * @base: Base address of InitIO controller + * + * Disable erase/write state of serial EEPROM + */ +void initio_se2_ew_ds(unsigned long base) { - tul_se2_instr(CurBase, 0); /* EWDS */ - TUL_WR(CurBase + TUL_NVRAM, 0); /* -CS */ - tul_se2_wait(); - return; + initio_se2_instr(base, 0); /* EWDS */ + outb(0, base + TUL_NVRAM); /* -CS */ + udelay(30); } -/****************************************************************** - Input :address of Serial E2PROM - Output :value stored in Serial E2PROM -*******************************************************************/ -static USHORT tul_se2_rd(WORD CurBase, ULONG adr) +/** + * initio_se2_rd - read E2PROM word + * @base: Base of InitIO controller + * @addr: Address of word in E2PROM + * + * Read a word from the NV E2PROM device + */ +static u16 initio_se2_rd(unsigned long base, u8 addr) { - UCHAR instr, readByte; - USHORT readWord; + u8 instr, rb; + u16 val = 0; int i; - instr = (UCHAR) (adr | 0x80); - tul_se2_instr(CurBase, instr); /* READ INSTR */ - readWord = 0; + instr = (u8) (addr | 0x80); + initio_se2_instr(base, instr); /* READ INSTR */ for (i = 15; i >= 0; i--) { - TUL_WR(CurBase + TUL_NVRAM, SE2CS | SE2CLK); /* +CLK */ - tul_se2_wait(); - TUL_WR(CurBase + TUL_NVRAM, SE2CS); /* -CLK */ + outb(SE2CS | SE2CLK, base + TUL_NVRAM); /* +CLK */ + udelay(30); + outb(SE2CS, base + TUL_NVRAM); /* -CLK */ /* sample data after the following edge of clock */ - readByte = TUL_RD(CurBase, TUL_NVRAM); - readByte &= SE2DI; - readWord += (readByte << i); - tul_se2_wait(); /* 6/20/95 */ + rb = inb(base + TUL_NVRAM); + rb &= SE2DI; + val += (rb << i); + udelay(30); /* 6/20/95 */ } - TUL_WR(CurBase + TUL_NVRAM, 0); /* no chip select */ - tul_se2_wait(); - return readWord; + outb(0, base + TUL_NVRAM); /* no chip select */ + udelay(30); + return val; } - -/****************************************************************** - Input: new value in Serial E2PROM, address of Serial E2PROM -*******************************************************************/ -static void tul_se2_wr(WORD CurBase, UCHAR adr, USHORT writeWord) +/** + * initio_se2_wr - read E2PROM word + * @base: Base of InitIO controller + * @addr: Address of word in E2PROM + * @val: Value to write + * + * Write a word to the NV E2PROM device. Used when recovering from + * a problem with the NV. + */ +static void initio_se2_wr(unsigned long base, u8 addr, u16 val) { - UCHAR readByte; - UCHAR instr; + u8 rb; + u8 instr; int i; - instr = (UCHAR) (adr | 0x40); - tul_se2_instr(CurBase, instr); /* WRITE INSTR */ + instr = (u8) (addr | 0x40); + initio_se2_instr(base, instr); /* WRITE INSTR */ for (i = 15; i >= 0; i--) { - if (writeWord & 0x8000) - TUL_WR(CurBase + TUL_NVRAM, SE2CS | SE2DO); /* -CLK+dataBit 1 */ + if (val & 0x8000) + outb(SE2CS | SE2DO, base + TUL_NVRAM); /* -CLK+dataBit 1 */ else - TUL_WR(CurBase + TUL_NVRAM, SE2CS); /* -CLK+dataBit 0 */ - tul_se2_wait(); - TUL_WR(CurBase + TUL_NVRAM, SE2CS | SE2CLK); /* +CLK */ - tul_se2_wait(); - writeWord <<= 1; + outb(SE2CS, base + TUL_NVRAM); /* -CLK+dataBit 0 */ + udelay(30); + outb(SE2CS | SE2CLK, base + TUL_NVRAM); /* +CLK */ + udelay(30); + val <<= 1; } - TUL_WR(CurBase + TUL_NVRAM, SE2CS); /* -CLK */ - tul_se2_wait(); - TUL_WR(CurBase + TUL_NVRAM, 0); /* -CS */ - tul_se2_wait(); + outb(SE2CS, base + TUL_NVRAM); /* -CLK */ + udelay(30); + outb(0, base + TUL_NVRAM); /* -CS */ + udelay(30); - TUL_WR(CurBase + TUL_NVRAM, SE2CS); /* +CS */ - tul_se2_wait(); + outb(SE2CS, base + TUL_NVRAM); /* +CS */ + udelay(30); for (;;) { - TUL_WR(CurBase + TUL_NVRAM, SE2CS | SE2CLK); /* +CLK */ - tul_se2_wait(); - TUL_WR(CurBase + TUL_NVRAM, SE2CS); /* -CLK */ - tul_se2_wait(); - if ((readByte = TUL_RD(CurBase, TUL_NVRAM)) & SE2DI) + outb(SE2CS | SE2CLK, base + TUL_NVRAM); /* +CLK */ + udelay(30); + outb(SE2CS, base + TUL_NVRAM); /* -CLK */ + udelay(30); + if ((rb = inb(base + TUL_NVRAM)) & SE2DI) break; /* write complete */ } - TUL_WR(CurBase + TUL_NVRAM, 0); /* -CS */ - return; + outb(0, base + TUL_NVRAM); /* -CS */ } +/** + * initio_se2_rd_all - read hostadapter NV configuration + * @base: Base address of InitIO controller + * + * Reads the E2PROM data into main memory. Ensures that the checksum + * and header marker are valid. Returns 1 on success -1 on error. + */ -/*********************************************************************** - Read SCSI H/A configuration parameters from serial EEPROM -************************************************************************/ -int tul_se2_rd_all(WORD CurBase) +static int initio_se2_rd_all(unsigned long base) { int i; - ULONG chksum = 0; - USHORT *np; + u16 chksum = 0; + u16 *np; i91unvramp = &i91unvram; - np = (USHORT *) i91unvramp; - for (i = 0; i < 32; i++) { - *np++ = tul_se2_rd(CurBase, i); - } + np = (u16 *) i91unvramp; + for (i = 0; i < 32; i++) + *np++ = initio_se2_rd(base, i); -/*--------------------Is signature "ini" ok ? ----------------*/ + /* Is signature "ini" ok ? */ if (i91unvramp->NVM_Signature != INI_SIGNATURE) return -1; -/*---------------------- Is ckecksum ok ? ----------------------*/ - np = (USHORT *) i91unvramp; + /* Is ckecksum ok ? */ + np = (u16 *) i91unvramp; for (i = 0; i < 31; i++) chksum += *np++; - if (i91unvramp->NVM_CheckSum != (USHORT) chksum) + if (i91unvramp->NVM_CheckSum != chksum) return -1; return 1; } - -/*********************************************************************** - Update SCSI H/A configuration parameters from serial EEPROM -************************************************************************/ -void tul_se2_update_all(WORD CurBase) +/** + * initio_se2_update_all - Update E2PROM + * @base: Base of InitIO controller + * + * Update the E2PROM by wrting any changes into the E2PROM + * chip, rewriting the checksum. + */ +static void initio_se2_update_all(unsigned long base) { /* setup default pattern */ int i; - ULONG chksum = 0; - USHORT *np, *np1; + u16 chksum = 0; + u16 *np, *np1; i91unvramp = &i91unvram; /* Calculate checksum first */ - np = (USHORT *) i91udftNvRam; + np = (u16 *) i91udftNvRam; for (i = 0; i < 31; i++) chksum += *np++; - *np = (USHORT) chksum; - tul_se2_ew_en(CurBase); /* Enable write */ + *np = chksum; + initio_se2_ew_en(base); /* Enable write */ - np = (USHORT *) i91udftNvRam; - np1 = (USHORT *) i91unvramp; + np = (u16 *) i91udftNvRam; + np1 = (u16 *) i91unvramp; for (i = 0; i < 32; i++, np++, np1++) { - if (*np != *np1) { - tul_se2_wr(CurBase, i, *np); - } + if (*np != *np1) + initio_se2_wr(base, i, *np); } - - tul_se2_ew_ds(CurBase); /* Disable write */ - return; + initio_se2_ew_ds(base); /* Disable write */ } -/************************************************************************* - Function name : read_eeprom -**************************************************************************/ -void tul_read_eeprom(WORD CurBase) -{ - UCHAR gctrl; - - i91unvramp = &i91unvram; -/*------Enable EEProm programming ---*/ - gctrl = TUL_RD(CurBase, TUL_GCTRL); - TUL_WR(CurBase + TUL_GCTRL, gctrl | TUL_GCTRL_EEPROM_BIT); - if (tul_se2_rd_all(CurBase) != 1) { - tul_se2_update_all(CurBase); /* setup default pattern */ - tul_se2_rd_all(CurBase); /* load again */ - } -/*------ Disable EEProm programming ---*/ - gctrl = TUL_RD(CurBase, TUL_GCTRL); - TUL_WR(CurBase + TUL_GCTRL, gctrl & ~TUL_GCTRL_EEPROM_BIT); -} /* read_eeprom */ +/** + * initio_read_eeprom - Retrieve configuration + * @base: Base of InitIO Host Adapter + * + * Retrieve the host adapter configuration data from E2Prom. If the + * data is invalid then the defaults are used and are also restored + * into the E2PROM. This forms the access point for the SCSI driver + * into the E2PROM layer, the other functions for the E2PROM are all + * internal use. + * + * Must be called single threaded, uses a shared global area. + */ -static int Addi91u_into_Adapter_table(WORD wBIOS, WORD wBASE, BYTE bInterrupt, - BYTE bBus, BYTE bDevice) +static void initio_read_eeprom(unsigned long base) { - int i, j; + u8 gctrl; - for (i = 0; i < MAX_SUPPORTED_ADAPTERS; i++) { - if (i91u_adpt[i].ADPT_BIOS < wBIOS) - continue; - if (i91u_adpt[i].ADPT_BIOS == wBIOS) { - if (i91u_adpt[i].ADPT_BASE == wBASE) { - if (i91u_adpt[i].ADPT_Bus != 0xFF) - return 1; - } else if (i91u_adpt[i].ADPT_BASE < wBASE) - continue; - } - for (j = MAX_SUPPORTED_ADAPTERS - 1; j > i; j--) { - i91u_adpt[j].ADPT_BASE = i91u_adpt[j - 1].ADPT_BASE; - i91u_adpt[j].ADPT_INTR = i91u_adpt[j - 1].ADPT_INTR; - i91u_adpt[j].ADPT_BIOS = i91u_adpt[j - 1].ADPT_BIOS; - i91u_adpt[j].ADPT_Bus = i91u_adpt[j - 1].ADPT_Bus; - i91u_adpt[j].ADPT_Device = i91u_adpt[j - 1].ADPT_Device; - } - i91u_adpt[i].ADPT_BASE = wBASE; - i91u_adpt[i].ADPT_INTR = bInterrupt; - i91u_adpt[i].ADPT_BIOS = wBIOS; - i91u_adpt[i].ADPT_Bus = bBus; - i91u_adpt[i].ADPT_Device = bDevice; - return 0; + i91unvramp = &i91unvram; + /* Enable EEProm programming */ + gctrl = inb(base + TUL_GCTRL); + outb(gctrl | TUL_GCTRL_EEPROM_BIT, base + TUL_GCTRL); + if (initio_se2_rd_all(base) != 1) { + initio_se2_update_all(base); /* setup default pattern */ + initio_se2_rd_all(base); /* load again */ } - return 1; + /* Disable EEProm programming */ + gctrl = inb(base + TUL_GCTRL); + outb(gctrl & ~TUL_GCTRL_EEPROM_BIT, base + TUL_GCTRL); } -static void init_i91uAdapter_table(void) -{ - int i; - - for (i = 0; i < MAX_SUPPORTED_ADAPTERS; i++) { /* Initialize adapter structure */ - i91u_adpt[i].ADPT_BIOS = 0xffff; - i91u_adpt[i].ADPT_BASE = 0xffff; - i91u_adpt[i].ADPT_INTR = 0xff; - i91u_adpt[i].ADPT_Bus = 0xff; - i91u_adpt[i].ADPT_Device = 0xff; - } - return; -} +/** + * initio_stop_bm - stop bus master + * @host: InitIO we are stopping + * + * Stop any pending DMA operation, aborting the DMA if neccessary + */ -static void tul_stop_bm(HCS * pCurHcb) +static void initio_stop_bm(struct initio_host * host) { - if (TUL_RD(pCurHcb->HCS_Base, TUL_XStatus) & XPEND) { /* if DMA xfer is pending, abort DMA xfer */ - TUL_WR(pCurHcb->HCS_Base + TUL_XCmd, TAX_X_ABT | TAX_X_CLR_FIFO); + if (inb(host->addr + TUL_XStatus) & XPEND) { /* if DMA xfer is pending, abort DMA xfer */ + outb(TAX_X_ABT | TAX_X_CLR_FIFO, host->addr + TUL_XCmd); /* wait Abort DMA xfer done */ - while ((TUL_RD(pCurHcb->HCS_Base, TUL_Int) & XABT) == 0); + while ((inb(host->addr + TUL_Int) & XABT) == 0) + cpu_relax(); } - TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_FLUSH_FIFO); + outb(TSC_FLUSH_FIFO, host->addr + TUL_SCtrl0); } -/***************************************************************************/ -static void get_tulipPCIConfig(HCS * pCurHcb, int ch_idx) -{ - pCurHcb->HCS_Base = i91u_adpt[ch_idx].ADPT_BASE; /* Supply base address */ - pCurHcb->HCS_BIOS = i91u_adpt[ch_idx].ADPT_BIOS; /* Supply BIOS address */ - pCurHcb->HCS_Intr = i91u_adpt[ch_idx].ADPT_INTR; /* Supply interrupt line */ - return; -} +/** + * initio_reset_scsi - Reset SCSI host controller + * @host: InitIO host to reset + * @seconds: Recovery time + * + * Perform a full reset of the SCSI subsystem. + */ -/***************************************************************************/ -static int tul_reset_scsi(HCS * pCurHcb, int seconds) +static int initio_reset_scsi(struct initio_host * host, int seconds) { - TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_RST_BUS); + outb(TSC_RST_BUS, host->addr + TUL_SCtrl0); - while (!((pCurHcb->HCS_JSInt = TUL_RD(pCurHcb->HCS_Base, TUL_SInt)) & TSS_SCSIRST_INT)); - /* reset tulip chip */ + while (!((host->jsint = inb(host->addr + TUL_SInt)) & TSS_SCSIRST_INT)) + cpu_relax(); - TUL_WR(pCurHcb->HCS_Base + TUL_SSignal, 0); + /* reset tulip chip */ + outb(0, host->addr + TUL_SSignal); /* Stall for a while, wait for target's firmware ready,make it 2 sec ! */ /* SONY 5200 tape drive won't work if only stall for 1 sec */ - tul_do_pause(seconds * HZ); - - TUL_RD(pCurHcb->HCS_Base, TUL_SInt); + /* FIXME: this is a very long busy wait right now */ + initio_do_pause(seconds * HZ); - return (SCSI_RESET_SUCCESS); + inb(host->addr + TUL_SInt); + return SCSI_RESET_SUCCESS; } -/***************************************************************************/ -static int init_tulip(HCS * pCurHcb, SCB * scbp, int tul_num_scb, - BYTE * pbBiosAdr, int seconds) +/** + * initio_init - set up an InitIO host adapter + * @host: InitIO host adapter + * @num_scbs: Number of SCBS + * @bios_addr: BIOS address + * + * Set up the host adapter and devices according to the configuration + * retrieved from the E2PROM. + * + * Locking: Calls E2PROM layer code which is not re-enterable so must + * run single threaded for now. + */ + +static void initio_init(struct initio_host * host, u8 *bios_addr) { int i; - BYTE *pwFlags; - BYTE *pbHeads; - SCB *pTmpScb, *pPrevScb = NULL; - - pCurHcb->HCS_NumScbs = tul_num_scb; - pCurHcb->HCS_Semaph = 1; - spin_lock_init(&pCurHcb->HCS_SemaphLock); - pCurHcb->HCS_JSStatus0 = 0; - pCurHcb->HCS_Scb = scbp; - pCurHcb->HCS_NxtPend = scbp; - pCurHcb->HCS_NxtAvail = scbp; - for (i = 0, pTmpScb = scbp; i < tul_num_scb; i++, pTmpScb++) { - pTmpScb->SCB_TagId = i; - if (i != 0) - pPrevScb->SCB_NxtScb = pTmpScb; - pPrevScb = pTmpScb; - } - pPrevScb->SCB_NxtScb = NULL; - pCurHcb->HCS_ScbEnd = pTmpScb; - pCurHcb->HCS_FirstAvail = scbp; - pCurHcb->HCS_LastAvail = pPrevScb; - spin_lock_init(&pCurHcb->HCS_AvailLock); - pCurHcb->HCS_FirstPend = NULL; - pCurHcb->HCS_LastPend = NULL; - pCurHcb->HCS_FirstBusy = NULL; - pCurHcb->HCS_LastBusy = NULL; - pCurHcb->HCS_FirstDone = NULL; - pCurHcb->HCS_LastDone = NULL; - pCurHcb->HCS_ActScb = NULL; - pCurHcb->HCS_ActTcs = NULL; - - tul_read_eeprom(pCurHcb->HCS_Base); -/*---------- get H/A configuration -------------*/ + u8 *flags; + u8 *heads; + + /* Get E2Prom configuration */ + initio_read_eeprom(host->addr); if (i91unvramp->NVM_SCSIInfo[0].NVM_NumOfTarg == 8) - pCurHcb->HCS_MaxTar = 8; + host->max_tar = 8; else - pCurHcb->HCS_MaxTar = 16; + host->max_tar = 16; - pCurHcb->HCS_Config = i91unvramp->NVM_SCSIInfo[0].NVM_ChConfig1; + host->config = i91unvramp->NVM_SCSIInfo[0].NVM_ChConfig1; - pCurHcb->HCS_SCSI_ID = i91unvramp->NVM_SCSIInfo[0].NVM_ChSCSIID; - pCurHcb->HCS_IdMask = ~(1 << pCurHcb->HCS_SCSI_ID); + host->scsi_id = i91unvramp->NVM_SCSIInfo[0].NVM_ChSCSIID; + host->idmask = ~(1 << host->scsi_id); #ifdef CHK_PARITY /* Enable parity error response */ - TUL_WR(pCurHcb->HCS_Base + TUL_PCMD, TUL_RD(pCurHcb->HCS_Base, TUL_PCMD) | 0x40); + outb(inb(host->addr + TUL_PCMD) | 0x40, host->addr + TUL_PCMD); #endif /* Mask all the interrupt */ - TUL_WR(pCurHcb->HCS_Base + TUL_Mask, 0x1F); + outb(0x1F, host->addr + TUL_Mask); - tul_stop_bm(pCurHcb); + initio_stop_bm(host); /* --- Initialize the tulip --- */ - TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl0, TSC_RST_CHIP); + outb(TSC_RST_CHIP, host->addr + TUL_SCtrl0); /* program HBA's SCSI ID */ - TUL_WR(pCurHcb->HCS_Base + TUL_SScsiId, pCurHcb->HCS_SCSI_ID << 4); + outb(host->scsi_id << 4, host->addr + TUL_SScsiId); /* Enable Initiator Mode ,phase latch,alternate sync period mode, disable SCSI reset */ - if (pCurHcb->HCS_Config & HCC_EN_PAR) - pCurHcb->HCS_SConf1 = (TSC_INITDEFAULT | TSC_EN_SCSI_PAR); + if (host->config & HCC_EN_PAR) + host->sconf1 = (TSC_INITDEFAULT | TSC_EN_SCSI_PAR); else - pCurHcb->HCS_SConf1 = (TSC_INITDEFAULT); - TUL_WR(pCurHcb->HCS_Base + TUL_SConfig, pCurHcb->HCS_SConf1); + host->sconf1 = (TSC_INITDEFAULT); + outb(host->sconf1, host->addr + TUL_SConfig); - /* Enable HW reselect */ - TUL_WR(pCurHcb->HCS_Base + TUL_SCtrl1, TSC_HW_RESELECT); + /* Enable HW reselect */ + outb(TSC_HW_RESELECT, host->addr + TUL_SCtrl1); - TUL_WR(pCurHcb->HCS_Base + TUL_SPeriod, 0); + outb(0, host->addr + TUL_SPeriod); /* selection time out = 250 ms */ - TUL_WR(pCurHcb->HCS_Base + TUL_STimeOut, 153); + outb(153, host->addr + TUL_STimeOut); -/*--------- Enable SCSI terminator -----*/ - TUL_WR(pCurHcb->HCS_Base + TUL_XCtrl, (pCurHcb->HCS_Config & (HCC_ACT_TERM1 | HCC_ACT_TERM2))); - TUL_WR(pCurHcb->HCS_Base + TUL_GCTRL1, - ((pCurHcb->HCS_Config & HCC_AUTO_TERM) >> 4) | (TUL_RD(pCurHcb->HCS_Base, TUL_GCTRL1) & 0xFE)); + /* Enable SCSI terminator */ + outb((host->config & (HCC_ACT_TERM1 | HCC_ACT_TERM2)), + host->addr + TUL_XCtrl); + outb(((host->config & HCC_AUTO_TERM) >> 4) | + (inb(host->addr + TUL_GCTRL1) & 0xFE), + host->addr + TUL_GCTRL1); for (i = 0, - pwFlags = & (i91unvramp->NVM_SCSIInfo[0].NVM_Targ0Config), - pbHeads = pbBiosAdr + 0x180; - i < pCurHcb->HCS_MaxTar; - i++, pwFlags++) { - pCurHcb->HCS_Tcs[i].TCS_Flags = *pwFlags & ~(TCF_SYNC_DONE | TCF_WDTR_DONE); - if (pCurHcb->HCS_Tcs[i].TCS_Flags & TCF_EN_255) - pCurHcb->HCS_Tcs[i].TCS_DrvFlags = TCF_DRV_255_63; + flags = & (i91unvramp->NVM_SCSIInfo[0].NVM_Targ0Config), + heads = bios_addr + 0x180; + i < host->max_tar; + i++, flags++) { + host->targets[i].flags = *flags & ~(TCF_SYNC_DONE | TCF_WDTR_DONE); + if (host->targets[i].flags & TCF_EN_255) + host->targets[i].drv_flags = TCF_DRV_255_63; else - pCurHcb->HCS_Tcs[i].TCS_DrvFlags = 0; - pCurHcb->HCS_Tcs[i].TCS_JS_Period = 0; - pCurHcb->HCS_Tcs[i].TCS_SConfig0 = pCurHcb->HCS_SConf1; - pCurHcb->HCS_Tcs[i].TCS_DrvHead = *pbHeads++; - if (pCurHcb->HCS_Tcs[i].TCS_DrvHead == 255) - pCurHcb->HCS_Tcs[i].TCS_DrvFlags = TCF_DRV_255_63; + host->targets[i].drv_flags = 0; + host->targets[i].js_period = 0; + host->targets[i].sconfig0 = host->sconf1; + host->targets[i].heads = *heads++; + if (host->targets[i].heads == 255) + host->targets[i].drv_flags = TCF_DRV_255_63; else - pCurHcb->HCS_Tcs[i].TCS_DrvFlags = 0; - pCurHcb->HCS_Tcs[i].TCS_DrvSector = *pbHeads++; - pCurHcb->HCS_Tcs[i].TCS_Flags &= ~TCF_BUSY; - pCurHcb->HCS_ActTags[i] = 0; - pCurHcb->HCS_MaxTags[i] = 0xFF; + host->targets[i].drv_flags = 0; + host->targets[i].sectors = *heads++; + host->targets[i].flags &= ~TCF_BUSY; + host->act_tags[i] = 0; + host->max_tags[i] = 0xFF; } /* for */ printk("i91u: PCI Base=0x%04X, IRQ=%d, BIOS=0x%04X0, SCSI ID=%d\n", - pCurHcb->HCS_Base, pCurHcb->HCS_Intr, - pCurHcb->HCS_BIOS, pCurHcb->HCS_SCSI_ID); -/*------------------- reset SCSI Bus ---------------------------*/ - if (pCurHcb->HCS_Config & HCC_SCSI_RESET) { - printk("i91u: Reset SCSI Bus ... \n"); - tul_reset_scsi(pCurHcb, seconds); + host->addr, host->irq, + host->bios_addr, host->scsi_id); + /* Reset SCSI Bus */ + if (host->config & HCC_SCSI_RESET) { + printk(KERN_INFO "i91u: Reset SCSI Bus ... \n"); + initio_reset_scsi(host, 10); } - TUL_WR(pCurHcb->HCS_Base + TUL_SCFG1, 0x17); - TUL_WR(pCurHcb->HCS_Base + TUL_SIntEnable, 0xE9); - return (0); + outb(0x17, host->addr + TUL_SCFG1); + outb(0xE9, host->addr + TUL_SIntEnable); } -/***************************************************************************/ -static SCB *tul_alloc_scb(HCS * hcsp) +/** + * initio_alloc_scb - Allocate an SCB + * @host: InitIO host we are allocating for + * + * Walk the SCB list for the controller and allocate a free SCB if + * one exists. + */ +static struct scsi_ctrl_blk *initio_alloc_scb(struct initio_host *host) { - SCB *pTmpScb; - ULONG flags; - spin_lock_irqsave(&(hcsp->HCS_AvailLock), flags); - if ((pTmpScb = hcsp->HCS_FirstAvail) != NULL) { + struct scsi_ctrl_blk *scb; + unsigned long flags; + + spin_lock_irqsave(&host->avail_lock, flags); + if ((scb = host->first_avail) != NULL) { #if DEBUG_QUEUE - printk("find scb at %08lx\n", (ULONG) pTmpScb); + printk("find scb at %p\n", scb); #endif - if ((hcsp->HCS_FirstAvail = pTmpScb->SCB_NxtScb) == NULL) - hcsp->HCS_LastAvail = NULL; - pTmpScb->SCB_NxtScb = NULL; - pTmpScb->SCB_Status = SCB_RENT; + if ((host->first_avail = scb->next) == NULL) + host->last_avail = NULL; + scb->next = NULL; + scb->status = SCB_RENT; } - spin_unlock_irqrestore(&(hcsp->HCS_AvailLock), flags); - return (pTmpScb); + spin_unlock_irqrestore(&host->avail_lock, flags); + return scb; } -/***************************************************************************/ -static void tul_release_scb(HCS * hcsp, SCB * scbp) +/** + * initio_release_scb - Release an SCB + * @host: InitIO host that owns the SCB + * @cmnd: SCB command block being returned + * + * Return an allocated SCB to the host free list + */ + +static void initio_release_scb(struct initio_host * host, struct scsi_ctrl_blk * cmnd) { - ULONG flags; + unsigned long flags; #if DEBUG_QUEUE - printk("Release SCB %lx; ", (ULONG) scbp); + printk("Release SCB %p; ", cmnd); #endif - spin_lock_irqsave(&(hcsp->HCS_AvailLock), flags); - scbp->SCB_Srb = NULL; - scbp->SCB_Status = 0; - scbp->SCB_NxtScb = NULL; - if (hcsp->HCS_LastAvail != NULL) { - hcsp->HCS_LastAvail->SCB_NxtScb = scbp; |