diff options
author | Hong Liu <hong.liu@intel.com> | 2010-07-26 10:05:52 +0100 |
---|---|---|
committer | Matthew Garrett <mjg@redhat.com> | 2010-08-03 09:50:32 -0400 |
commit | 215c330fe92be8d9f74bc292ea085dbe2ace6bf5 (patch) | |
tree | 9ec3b38ee34160b2167e02e37ff0431ba3f118d1 /drivers/platform/x86/intel_scu_ipc.c | |
parent | 6c8d0fdbe88e8bb1a07fa9a2830767cc180f7d1b (diff) |
intel_scu_ipc: fix data packing of PMIC command on Moorestown
Data is 2-byte per entry for PMIC read-modify-update command.
Signed-off-by: Hong Liu <hong.liu@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Matthew Garrett <mjg@redhat.com>
Diffstat (limited to 'drivers/platform/x86/intel_scu_ipc.c')
-rw-r--r-- | drivers/platform/x86/intel_scu_ipc.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/platform/x86/intel_scu_ipc.c b/drivers/platform/x86/intel_scu_ipc.c index 5055c523c5e..84a2d4bfdec 100644 --- a/drivers/platform/x86/intel_scu_ipc.c +++ b/drivers/platform/x86/intel_scu_ipc.c @@ -154,7 +154,7 @@ static inline int busy_loop(void) /* Wait till scu status is busy */ /* Read/Write power control(PMIC in Langwell, MSIC in PenWell) registers */ static int pwr_reg_rdwr(u16 *addr, u8 *data, u32 count, u32 op, u32 id) { - int i, nc, bytes; + int i, nc, bytes, d; u32 offset = 0; u32 err = 0; u8 cbuf[IPC_WWBUF_SIZE] = { }; @@ -171,15 +171,16 @@ static int pwr_reg_rdwr(u16 *addr, u8 *data, u32 count, u32 op, u32 id) if (platform != MRST_CPU_CHIP_PENWELL) { bytes = 0; - for(i=0; i<count; i++) { + d = 0; + for (i = 0; i < count; i++) { cbuf[bytes++] = addr[i]; cbuf[bytes++] = addr[i] >> 8; if (id != IPC_CMD_PCNTRL_R) - cbuf[bytes++] = data[i]; + cbuf[bytes++] = data[d++]; if (id == IPC_CMD_PCNTRL_M) - cbuf[bytes++] = data[i + 1]; + cbuf[bytes++] = data[d++]; } - for(i=0; i<bytes; i+=4) + for (i = 0; i < bytes; i += 4) ipc_data_writel(wbuf[i/4], i); ipc_command(bytes << 16 | id << 12 | 0 << 8 | op); } else { |