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authorLen Brown <len.brown@intel.com>2010-09-28 23:30:58 -0400
committerLen Brown <len.brown@intel.com>2010-09-28 23:30:58 -0400
commit9587a678fa56ea6d7f39b048f24f5d03a89bf9b3 (patch)
tree5d56bd510b235188fc7243cce23b48211dd30777 /drivers/pci
parente9a64ed4994db04c9963495b03d8a86538e3ad55 (diff)
parent4731fdcf6f7bdab3e369a3f844d4ea4d4017284d (diff)
Merge branch 'meego-7093' into idle-release
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/quirks.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 89ed181cd90..857ae01734a 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -163,6 +163,26 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_CBUS_2, quirk_isa_d
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_CBUS_3, quirk_isa_dma_hangs);
/*
+ * Intel NM10 "TigerPoint" LPC PM1a_STS.BM_STS must be clear
+ * for some HT machines to use C4 w/o hanging.
+ */
+static void __devinit quirk_tigerpoint_bm_sts(struct pci_dev *dev)
+{
+ u32 pmbase;
+ u16 pm1a;
+
+ pci_read_config_dword(dev, 0x40, &pmbase);
+ pmbase = pmbase & 0xff80;
+ pm1a = inw(pmbase);
+
+ if (pm1a & 0x10) {
+ dev_info(&dev->dev, FW_BUG "TigerPoint LPC.BM_STS cleared\n");
+ outw(0x10, pmbase);
+ }
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TGP_LPC, quirk_tigerpoint_bm_sts);
+
+/*
* Chipsets where PCI->PCI transfers vanish or hang
*/
static void __devinit quirk_nopcipci(struct pci_dev *dev)