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authorWey-Yi Guy <wey-yi.w.guy@intel.com>2009-10-16 14:25:56 -0700
committerJohn W. Linville <linville@tuxdriver.com>2009-10-27 16:48:33 -0400
commit32004ee42fced8b2372dd2f93e65cc9d71e8c4bf (patch)
tree6bd1ad99945783704316b9a789292e635bee4877 /drivers/net/wireless/iwlwifi/iwl-eeprom.c
parent8d9698b3e6ce3c50f9ec5a0aaea4da82d5af7779 (diff)
iwlwifi: set auto clock gate disable bit for 6x00/6x50 series
For 6x00 and 6x50 series NIC with OTP shadow RAM, set auto clock gate disable bit when initializing OTP access. Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-eeprom.c')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
index 2e8c40576d2..9429cb1c69b 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
@@ -358,6 +358,14 @@ static int iwl_init_otp_access(struct iwl_priv *priv)
udelay(5);
iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
APMG_PS_CTRL_VAL_RESET_REQ);
+
+ /*
+ * CSR auto clock gate disable bit -
+ * this is only applicable for HW with OTP shadow RAM
+ */
+ if (priv->cfg->shadow_ram_support)
+ iwl_set_bit(priv, CSR_DBG_LINK_PWR_MGMT_REG,
+ CSR_RESET_LINK_PWR_MGMT_DISABLED);
}
return ret;
}