diff options
| author | Matt Carlson <mcarlson@broadcom.com> | 2010-08-02 11:25:58 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-08-02 15:46:28 -0700 |
| commit | 88075d915b51d9a17cc7436c868013a3113a849a (patch) | |
| tree | 8e55cb878c6928f6d6b9f44b21c9b2121452aa1a /drivers/net/tg3.h | |
| parent | c885e824699f49bc3758a0dec760e189cd774e79 (diff) | |
tg3: Don't access phy test ctrl reg for 5717+
The phy test register location has been repurposed for 5717+ devices.
This patch changes the code to avoid this location for these devices.
Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
| -rw-r--r-- | drivers/net/tg3.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index a5440458aa9..a7b8ec7b46c 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h @@ -1844,6 +1844,10 @@ #define TG3_PCIE_LNKCTL_L1_PLL_PD_DIS 0x00000080 /* 0x7d58 --> 0x7e70 unused */ +#define TG3_PCIE_PHY_TSTCTL 0x00007e2c +#define TG3_PCIE_PHY_TSTCTL_PCIE10 0x00000040 +#define TG3_PCIE_PHY_TSTCTL_PSCRAM 0x00000020 + #define TG3_PCIE_EIDLE_DELAY 0x00007e70 #define TG3_PCIE_EIDLE_DELAY_MASK 0x0000001f #define TG3_PCIE_EIDLE_DELAY_13_CLKS 0x0000000c |