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authorLinus Torvalds <torvalds@linux-foundation.org>2010-08-04 11:47:58 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2010-08-04 11:47:58 -0700
commit6ba74014c1ab0e37af7de6f64b4eccbbae3cb9e7 (patch)
tree8f3892fc44f1e403675a6d7e88fda5c70e56ee4c /drivers/net/qlge/qlge.h
parent5abd9ccced7a726c817dd6b5b96bc933859138d1 (diff)
parent3ff1c25927e3af61c6bf0e4ed959504058ae4565 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6: (1443 commits) phy/marvell: add 88ec048 support igb: Program MDICNFG register prior to PHY init e1000e: correct MAC-PHY interconnect register offset for 82579 hso: Add new product ID can: Add driver for esd CAN-USB/2 device l2tp: fix export of header file for userspace can-raw: Fix skb_orphan_try handling Revert "net: remove zap_completion_queue" net: cleanup inclusion phy/marvell: add 88e1121 interface mode support u32: negative offset fix net: Fix a typo from "dev" to "ndev" igb: Use irq_synchronize per vector when using MSI-X ixgbevf: fix null pointer dereference due to filter being set for VLAN 0 e1000e: Fix irq_synchronize in MSI-X case e1000e: register pm_qos request on hardware activation ip_fragment: fix subtracting PPPOE_SES_HLEN from mtu twice net: Add getsockopt support for TCP thin-streams cxgb4: update driver version cxgb4: add new PCI IDs ... Manually fix up conflicts in: - drivers/net/e1000e/netdev.c: due to pm_qos registration infrastructure changes - drivers/net/phy/marvell.c: conflict between adding 88ec048 support and cleaning up the IDs - drivers/net/wireless/ipw2x00/ipw2100.c: trivial ipw2100_pm_qos_req conflict (registration change vs marking it static)
Diffstat (limited to 'drivers/net/qlge/qlge.h')
-rw-r--r--drivers/net/qlge/qlge.h30
1 files changed, 14 insertions, 16 deletions
diff --git a/drivers/net/qlge/qlge.h b/drivers/net/qlge/qlge.h
index 20624ba44a3..a478786840a 100644
--- a/drivers/net/qlge/qlge.h
+++ b/drivers/net/qlge/qlge.h
@@ -16,9 +16,7 @@
*/
#define DRV_NAME "qlge"
#define DRV_STRING "QLogic 10 Gigabit PCI-E Ethernet Driver "
-#define DRV_VERSION "v1.00.00.23.00.00-01"
-
-#define PFX "qlge: "
+#define DRV_VERSION "v1.00.00.25.00.00-01"
#define WQ_ADDR_ALIGN 0x3 /* 4 byte alignment */
@@ -1062,7 +1060,7 @@ struct tx_buf_desc {
#define TX_DESC_LEN_MASK 0x000fffff
#define TX_DESC_C 0x40000000
#define TX_DESC_E 0x80000000
-} __attribute((packed));
+} __packed;
/*
* IOCB Definitions...
@@ -1095,7 +1093,7 @@ struct ob_mac_iocb_req {
__le16 vlan_tci;
__le16 reserved4;
struct tx_buf_desc tbd[TX_DESC_PER_IOCB];
-} __attribute((packed));
+} __packed;
struct ob_mac_iocb_rsp {
u8 opcode; /* */
@@ -1112,7 +1110,7 @@ struct ob_mac_iocb_rsp {
u32 tid;
u32 txq_idx;
__le32 reserved[13];
-} __attribute((packed));
+} __packed;
struct ob_mac_tso_iocb_req {
u8 opcode;
@@ -1140,7 +1138,7 @@ struct ob_mac_tso_iocb_req {
__le16 vlan_tci;
__le16 mss;
struct tx_buf_desc tbd[TX_DESC_PER_IOCB];
-} __attribute((packed));
+} __packed;
struct ob_mac_tso_iocb_rsp {
u8 opcode;
@@ -1157,7 +1155,7 @@ struct ob_mac_tso_iocb_rsp {
u32 tid;
u32 txq_idx;
__le32 reserved2[13];
-} __attribute((packed));
+} __packed;
struct ib_mac_iocb_rsp {
u8 opcode; /* 0x20 */
@@ -1216,7 +1214,7 @@ struct ib_mac_iocb_rsp {
#define IB_MAC_IOCB_RSP_HL 0x80
__le32 hdr_len; /* */
__le64 hdr_addr; /* */
-} __attribute((packed));
+} __packed;
struct ib_ae_iocb_rsp {
u8 opcode;
@@ -1237,7 +1235,7 @@ struct ib_ae_iocb_rsp {
#define PCI_ERR_ANON_BUF_RD 0x40
u8 q_id;
__le32 reserved[15];
-} __attribute((packed));
+} __packed;
/*
* These three structures are for generic
@@ -1249,7 +1247,7 @@ struct ql_net_rsp_iocb {
__le16 length;
__le32 tid;
__le32 reserved[14];
-} __attribute((packed));
+} __packed;
struct net_req_iocb {
u8 opcode;
@@ -1257,7 +1255,7 @@ struct net_req_iocb {
__le16 flags1;
__le32 tid;
__le32 reserved1[30];
-} __attribute((packed));
+} __packed;
/*
* tx ring initialization control block for chip.
@@ -1283,7 +1281,7 @@ struct wqicb {
__le16 rid;
__le64 addr;
__le64 cnsmr_idx_addr;
-} __attribute((packed));
+} __packed;
/*
* rx ring initialization control block for chip.
@@ -1317,7 +1315,7 @@ struct cqicb {
__le64 sbq_addr;
__le16 sbq_buf_size;
__le16 sbq_len; /* entry count */
-} __attribute((packed));
+} __packed;
struct ricb {
u8 base_cq;
@@ -1335,7 +1333,7 @@ struct ricb {
u8 hash_cq_id[1024];
__le32 ipv6_hash_key[10];
__le32 ipv4_hash_key[4];
-} __attribute((packed));
+} __packed;
/* SOFTWARE/DRIVER DATA STRUCTURES. */
@@ -2227,7 +2225,6 @@ int ql_dump_risc_ram_area(struct ql_adapter *qdev, void *buf,
u32 ram_addr, int word_count);
int ql_core_dump(struct ql_adapter *qdev,
struct ql_mpi_coredump *mpi_coredump);
-int ql_mb_sys_err(struct ql_adapter *qdev);
int ql_mb_about_fw(struct ql_adapter *qdev);
int ql_wol(struct ql_adapter *qdev);
int ql_mb_wol_set_magic(struct ql_adapter *qdev, u32 enable_wol);
@@ -2246,6 +2243,7 @@ netdev_tx_t ql_lb_send(struct sk_buff *skb, struct net_device *ndev);
void ql_check_lb_frame(struct ql_adapter *, struct sk_buff *);
int ql_own_firmware(struct ql_adapter *qdev);
int ql_clean_lb_rx_ring(struct rx_ring *rx_ring, int budget);
+void qlge_set_multicast_list(struct net_device *ndev);
#if 1
#define QL_ALL_DUMP