qlogic: Move the QLogic drivers

Moves the QLogic drivers into drivers/net/ethernet/qlogic/ and
the necessary Kconfig and Makefile changes.

CC: Ron Mercer <ron.mercer@qlogic.com>
CC: Amit Kumar Salecha <amit.salecha@qlogic.com>
CC: Anirban Chakraborty <anirban.chakraborty@qlogic.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Acked-by: Anirban Chakraborty <anirban.chakraborty@qlogic.com>

1 files changed, 0 insertions, 3970 deletions

diff --git a/drivers/net/qla3xxx.c b/drivers/net/qla3xxx.c
deleted file mode 100644
index ccde8061afa..00000000000
--- a/drivers/net/qla3xxx.c
+++ /dev/null
@@ -1,3970 +0,0 @@
-/*
- * QLogic QLA3xxx NIC HBA Driver
- * Copyright (c)  2003-2006 QLogic Corporation
- *
- * See LICENSE.qla3xxx for copyright and licensing details.
- */
-
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/module.h>
-#include <linux/list.h>
-#include <linux/pci.h>
-#include <linux/dma-mapping.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
-#include <linux/dmapool.h>
-#include <linux/mempool.h>
-#include <linux/spinlock.h>
-#include <linux/kthread.h>
-#include <linux/interrupt.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/ip.h>
-#include <linux/in.h>
-#include <linux/if_arp.h>
-#include <linux/if_ether.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/ethtool.h>
-#include <linux/skbuff.h>
-#include <linux/rtnetlink.h>
-#include <linux/if_vlan.h>
-#include <linux/delay.h>
-#include <linux/mm.h>
-#include <linux/prefetch.h>
-
-#include "qla3xxx.h"
-
-#define DRV_NAME	"qla3xxx"
-#define DRV_STRING	"QLogic ISP3XXX Network Driver"
-#define DRV_VERSION	"v2.03.00-k5"
-
-static const char ql3xxx_driver_name[] = DRV_NAME;
-static const char ql3xxx_driver_version[] = DRV_VERSION;
-
-#define TIMED_OUT_MSG							\
-"Timed out waiting for management port to get free before issuing command\n"
-
-MODULE_AUTHOR("QLogic Corporation");
-MODULE_DESCRIPTION("QLogic ISP3XXX Network Driver " DRV_VERSION " ");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(DRV_VERSION);
-
-static const u32 default_msg
-    = NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
-    | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
-
-static int debug = -1;		/* defaults above */
-module_param(debug, int, 0);
-MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
-
-static int msi;
-module_param(msi, int, 0);
-MODULE_PARM_DESC(msi, "Turn on Message Signaled Interrupts.");
-
-static DEFINE_PCI_DEVICE_TABLE(ql3xxx_pci_tbl) = {
-	{PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, QL3022_DEVICE_ID)},
-	{PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, QL3032_DEVICE_ID)},
-	/* required last entry */
-	{0,}
-};
-
-MODULE_DEVICE_TABLE(pci, ql3xxx_pci_tbl);
-
-/*
- *  These are the known PHY's which are used
- */
-enum PHY_DEVICE_TYPE {
-   PHY_TYPE_UNKNOWN   = 0,
-   PHY_VITESSE_VSC8211,
-   PHY_AGERE_ET1011C,
-   MAX_PHY_DEV_TYPES
-};
-
-struct PHY_DEVICE_INFO {
-	const enum PHY_DEVICE_TYPE	phyDevice;
-	const u32		phyIdOUI;
-	const u16		phyIdModel;
-	const char		*name;
-};
-
-static const struct PHY_DEVICE_INFO PHY_DEVICES[] = {
-	{PHY_TYPE_UNKNOWN,    0x000000, 0x0, "PHY_TYPE_UNKNOWN"},
-	{PHY_VITESSE_VSC8211, 0x0003f1, 0xb, "PHY_VITESSE_VSC8211"},
-	{PHY_AGERE_ET1011C,   0x00a0bc, 0x1, "PHY_AGERE_ET1011C"},
-};
-
-
-/*
- * Caller must take hw_lock.
- */
-static int ql_sem_spinlock(struct ql3_adapter *qdev,
-			    u32 sem_mask, u32 sem_bits)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-		qdev->mem_map_registers;
-	u32 value;
-	unsigned int seconds = 3;
-
-	do {
-		writel((sem_mask | sem_bits),
-		       &port_regs->CommonRegs.semaphoreReg);
-		value = readl(&port_regs->CommonRegs.semaphoreReg);
-		if ((value & (sem_mask >> 16)) == sem_bits)
-			return 0;
-		ssleep(1);
-	} while (--seconds);
-	return -1;
-}
-
-static void ql_sem_unlock(struct ql3_adapter *qdev, u32 sem_mask)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-		qdev->mem_map_registers;
-	writel(sem_mask, &port_regs->CommonRegs.semaphoreReg);
-	readl(&port_regs->CommonRegs.semaphoreReg);
-}
-
-static int ql_sem_lock(struct ql3_adapter *qdev, u32 sem_mask, u32 sem_bits)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-		qdev->mem_map_registers;
-	u32 value;
-
-	writel((sem_mask | sem_bits), &port_regs->CommonRegs.semaphoreReg);
-	value = readl(&port_regs->CommonRegs.semaphoreReg);
-	return ((value & (sem_mask >> 16)) == sem_bits);
-}
-
-/*
- * Caller holds hw_lock.
- */
-static int ql_wait_for_drvr_lock(struct ql3_adapter *qdev)
-{
-	int i = 0;
-
-	while (i < 10) {
-		if (i)
-			ssleep(1);
-
-		if (ql_sem_lock(qdev,
-				QL_DRVR_SEM_MASK,
-				(QL_RESOURCE_BITS_BASE_CODE | (qdev->mac_index)
-				 * 2) << 1)) {
-			netdev_printk(KERN_DEBUG, qdev->ndev,
-				      "driver lock acquired\n");
-			return 1;
-		}
-	}
-
-	netdev_err(qdev->ndev, "Timed out waiting for driver lock...\n");
-	return 0;
-}
-
-static void ql_set_register_page(struct ql3_adapter *qdev, u32 page)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-		qdev->mem_map_registers;
-
-	writel(((ISP_CONTROL_NP_MASK << 16) | page),
-			&port_regs->CommonRegs.ispControlStatus);
-	readl(&port_regs->CommonRegs.ispControlStatus);
-	qdev->current_page = page;
-}
-
-static u32 ql_read_common_reg_l(struct ql3_adapter *qdev, u32 __iomem *reg)
-{
-	u32 value;
-	unsigned long hw_flags;
-
-	spin_lock_irqsave(&qdev->hw_lock, hw_flags);
-	value = readl(reg);
-	spin_unlock_irqrestore(&qdev->hw_lock, hw_flags);
-
-	return value;
-}
-
-static u32 ql_read_common_reg(struct ql3_adapter *qdev, u32 __iomem *reg)
-{
-	return readl(reg);
-}
-
-static u32 ql_read_page0_reg_l(struct ql3_adapter *qdev, u32 __iomem *reg)
-{
-	u32 value;
-	unsigned long hw_flags;
-
-	spin_lock_irqsave(&qdev->hw_lock, hw_flags);
-
-	if (qdev->current_page != 0)
-		ql_set_register_page(qdev, 0);
-	value = readl(reg);
-
-	spin_unlock_irqrestore(&qdev->hw_lock, hw_flags);
-	return value;
-}
-
-static u32 ql_read_page0_reg(struct ql3_adapter *qdev, u32 __iomem *reg)
-{
-	if (qdev->current_page != 0)
-		ql_set_register_page(qdev, 0);
-	return readl(reg);
-}
-
-static void ql_write_common_reg_l(struct ql3_adapter *qdev,
-				u32 __iomem *reg, u32 value)
-{
-	unsigned long hw_flags;
-
-	spin_lock_irqsave(&qdev->hw_lock, hw_flags);
-	writel(value, reg);
-	readl(reg);
-	spin_unlock_irqrestore(&qdev->hw_lock, hw_flags);
-}
-
-static void ql_write_common_reg(struct ql3_adapter *qdev,
-				u32 __iomem *reg, u32 value)
-{
-	writel(value, reg);
-	readl(reg);
-}
-
-static void ql_write_nvram_reg(struct ql3_adapter *qdev,
-				u32 __iomem *reg, u32 value)
-{
-	writel(value, reg);
-	readl(reg);
-	udelay(1);
-}
-
-static void ql_write_page0_reg(struct ql3_adapter *qdev,
-			       u32 __iomem *reg, u32 value)
-{
-	if (qdev->current_page != 0)
-		ql_set_register_page(qdev, 0);
-	writel(value, reg);
-	readl(reg);
-}
-
-/*
- * Caller holds hw_lock. Only called during init.
- */
-static void ql_write_page1_reg(struct ql3_adapter *qdev,
-			       u32 __iomem *reg, u32 value)
-{
-	if (qdev->current_page != 1)
-		ql_set_register_page(qdev, 1);
-	writel(value, reg);
-	readl(reg);
-}
-
-/*
- * Caller holds hw_lock. Only called during init.
- */
-static void ql_write_page2_reg(struct ql3_adapter *qdev,
-			       u32 __iomem *reg, u32 value)
-{
-	if (qdev->current_page != 2)
-		ql_set_register_page(qdev, 2);
-	writel(value, reg);
-	readl(reg);
-}
-
-static void ql_disable_interrupts(struct ql3_adapter *qdev)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-		qdev->mem_map_registers;
-
-	ql_write_common_reg_l(qdev, &port_regs->CommonRegs.ispInterruptMaskReg,
-			    (ISP_IMR_ENABLE_INT << 16));
-
-}
-
-static void ql_enable_interrupts(struct ql3_adapter *qdev)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-		qdev->mem_map_registers;
-
-	ql_write_common_reg_l(qdev, &port_regs->CommonRegs.ispInterruptMaskReg,
-			    ((0xff << 16) | ISP_IMR_ENABLE_INT));
-
-}
-
-static void ql_release_to_lrg_buf_free_list(struct ql3_adapter *qdev,
-					    struct ql_rcv_buf_cb *lrg_buf_cb)
-{
-	dma_addr_t map;
-	int err;
-	lrg_buf_cb->next = NULL;
-
-	if (qdev->lrg_buf_free_tail == NULL) {	/* The list is empty  */
-		qdev->lrg_buf_free_head = qdev->lrg_buf_free_tail = lrg_buf_cb;
-	} else {
-		qdev->lrg_buf_free_tail->next = lrg_buf_cb;
-		qdev->lrg_buf_free_tail = lrg_buf_cb;
-	}
-
-	if (!lrg_buf_cb->skb) {
-		lrg_buf_cb->skb = netdev_alloc_skb(qdev->ndev,
-						   qdev->lrg_buffer_len);
-		if (unlikely(!lrg_buf_cb->skb)) {
-			netdev_err(qdev->ndev, "failed netdev_alloc_skb()\n");
-			qdev->lrg_buf_skb_check++;
-		} else {
-			/*
-			 * We save some space to copy the ethhdr from first
-			 * buffer
-			 */
-			skb_reserve(lrg_buf_cb->skb, QL_HEADER_SPACE);
-			map = pci_map_single(qdev->pdev,
-					     lrg_buf_cb->skb->data,
-					     qdev->lrg_buffer_len -
-					     QL_HEADER_SPACE,
-					     PCI_DMA_FROMDEVICE);
-			err = pci_dma_mapping_error(qdev->pdev, map);
-			if (err) {
-				netdev_err(qdev->ndev,
-					   "PCI mapping failed with error: %d\n",
-					   err);
-				dev_kfree_skb(lrg_buf_cb->skb);
-				lrg_buf_cb->skb = NULL;
-
-				qdev->lrg_buf_skb_check++;
-				return;
-			}
-
-			lrg_buf_cb->buf_phy_addr_low =
-			    cpu_to_le32(LS_64BITS(map));
-			lrg_buf_cb->buf_phy_addr_high =
-			    cpu_to_le32(MS_64BITS(map));
-			dma_unmap_addr_set(lrg_buf_cb, mapaddr, map);
-			dma_unmap_len_set(lrg_buf_cb, maplen,
-					  qdev->lrg_buffer_len -
-					  QL_HEADER_SPACE);
-		}
-	}
-
-	qdev->lrg_buf_free_count++;
-}
-
-static struct ql_rcv_buf_cb *ql_get_from_lrg_buf_free_list(struct ql3_adapter
-							   *qdev)
-{
-	struct ql_rcv_buf_cb *lrg_buf_cb = qdev->lrg_buf_free_head;
-
-	if (lrg_buf_cb != NULL) {
-		qdev->lrg_buf_free_head = lrg_buf_cb->next;
-		if (qdev->lrg_buf_free_head == NULL)
-			qdev->lrg_buf_free_tail = NULL;
-		qdev->lrg_buf_free_count--;
-	}
-
-	return lrg_buf_cb;
-}
-
-static u32 addrBits = EEPROM_NO_ADDR_BITS;
-static u32 dataBits = EEPROM_NO_DATA_BITS;
-
-static void fm93c56a_deselect(struct ql3_adapter *qdev);
-static void eeprom_readword(struct ql3_adapter *qdev, u32 eepromAddr,
-			    unsigned short *value);
-
-/*
- * Caller holds hw_lock.
- */
-static void fm93c56a_select(struct ql3_adapter *qdev)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-	__iomem u32 *spir = &port_regs->CommonRegs.serialPortInterfaceReg;
-
-	qdev->eeprom_cmd_data = AUBURN_EEPROM_CS_1;
-	ql_write_nvram_reg(qdev, spir, ISP_NVRAM_MASK | qdev->eeprom_cmd_data);
-	ql_write_nvram_reg(qdev, spir,
-			   ((ISP_NVRAM_MASK << 16) | qdev->eeprom_cmd_data));
-}
-
-/*
- * Caller holds hw_lock.
- */
-static void fm93c56a_cmd(struct ql3_adapter *qdev, u32 cmd, u32 eepromAddr)
-{
-	int i;
-	u32 mask;
-	u32 dataBit;
-	u32 previousBit;
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-	__iomem u32 *spir = &port_regs->CommonRegs.serialPortInterfaceReg;
-
-	/* Clock in a zero, then do the start bit */
-	ql_write_nvram_reg(qdev, spir,
-			   (ISP_NVRAM_MASK | qdev->eeprom_cmd_data |
-			    AUBURN_EEPROM_DO_1));
-	ql_write_nvram_reg(qdev, spir,
-			   (ISP_NVRAM_MASK | qdev->eeprom_cmd_data |
-			    AUBURN_EEPROM_DO_1 | AUBURN_EEPROM_CLK_RISE));
-	ql_write_nvram_reg(qdev, spir,
-			   (ISP_NVRAM_MASK | qdev->eeprom_cmd_data |
-			    AUBURN_EEPROM_DO_1 | AUBURN_EEPROM_CLK_FALL));
-
-	mask = 1 << (FM93C56A_CMD_BITS - 1);
-	/* Force the previous data bit to be different */
-	previousBit = 0xffff;
-	for (i = 0; i < FM93C56A_CMD_BITS; i++) {
-		dataBit = (cmd & mask)
-			? AUBURN_EEPROM_DO_1
-			: AUBURN_EEPROM_DO_0;
-		if (previousBit != dataBit) {
-			/* If the bit changed, change the DO state to match */
-			ql_write_nvram_reg(qdev, spir,
-					   (ISP_NVRAM_MASK |
-					    qdev->eeprom_cmd_data | dataBit));
-			previousBit = dataBit;
-		}
-		ql_write_nvram_reg(qdev, spir,
-				   (ISP_NVRAM_MASK | qdev->eeprom_cmd_data |
-				    dataBit | AUBURN_EEPROM_CLK_RISE));
-		ql_write_nvram_reg(qdev, spir,
-				   (ISP_NVRAM_MASK | qdev->eeprom_cmd_data |
-				    dataBit | AUBURN_EEPROM_CLK_FALL));
-		cmd = cmd << 1;
-	}
-
-	mask = 1 << (addrBits - 1);
-	/* Force the previous data bit to be different */
-	previousBit = 0xffff;
-	for (i = 0; i < addrBits; i++) {
-		dataBit = (eepromAddr & mask) ? AUBURN_EEPROM_DO_1
-			: AUBURN_EEPROM_DO_0;
-		if (previousBit != dataBit) {
-			/*
-			 * If the bit changed, then change the DO state to
-			 * match
-			 */
-			ql_write_nvram_reg(qdev, spir,
-					   (ISP_NVRAM_MASK |
-					    qdev->eeprom_cmd_data | dataBit));
-			previousBit = dataBit;
-		}
-		ql_write_nvram_reg(qdev, spir,
-				   (ISP_NVRAM_MASK | qdev->eeprom_cmd_data |
-				    dataBit | AUBURN_EEPROM_CLK_RISE));
-		ql_write_nvram_reg(qdev, spir,
-				   (ISP_NVRAM_MASK | qdev->eeprom_cmd_data |
-				    dataBit | AUBURN_EEPROM_CLK_FALL));
-		eepromAddr = eepromAddr << 1;
-	}
-}
-
-/*
- * Caller holds hw_lock.
- */
-static void fm93c56a_deselect(struct ql3_adapter *qdev)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-	__iomem u32 *spir = &port_regs->CommonRegs.serialPortInterfaceReg;
-
-	qdev->eeprom_cmd_data = AUBURN_EEPROM_CS_0;
-	ql_write_nvram_reg(qdev, spir, ISP_NVRAM_MASK | qdev->eeprom_cmd_data);
-}
-
-/*
- * Caller holds hw_lock.
- */
-static void fm93c56a_datain(struct ql3_adapter *qdev, unsigned short *value)
-{
-	int i;
-	u32 data = 0;
-	u32 dataBit;
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-	__iomem u32 *spir = &port_regs->CommonRegs.serialPortInterfaceReg;
-
-	/* Read the data bits */
-	/* The first bit is a dummy.  Clock right over it. */
-	for (i = 0; i < dataBits; i++) {
-		ql_write_nvram_reg(qdev, spir,
-				   ISP_NVRAM_MASK | qdev->eeprom_cmd_data |
-				   AUBURN_EEPROM_CLK_RISE);
-		ql_write_nvram_reg(qdev, spir,
-				   ISP_NVRAM_MASK | qdev->eeprom_cmd_data |
-				   AUBURN_EEPROM_CLK_FALL);
-		dataBit = (ql_read_common_reg(qdev, spir) &
-			   AUBURN_EEPROM_DI_1) ? 1 : 0;
-		data = (data << 1) | dataBit;
-	}
-	*value = (u16)data;
-}
-
-/*
- * Caller holds hw_lock.
- */
-static void eeprom_readword(struct ql3_adapter *qdev,
-			    u32 eepromAddr, unsigned short *value)
-{
-	fm93c56a_select(qdev);
-	fm93c56a_cmd(qdev, (int)FM93C56A_READ, eepromAddr);
-	fm93c56a_datain(qdev, value);
-	fm93c56a_deselect(qdev);
-}
-
-static void ql_set_mac_addr(struct net_device *ndev, u16 *addr)
-{
-	__le16 *p = (__le16 *)ndev->dev_addr;
-	p[0] = cpu_to_le16(addr[0]);
-	p[1] = cpu_to_le16(addr[1]);
-	p[2] = cpu_to_le16(addr[2]);
-}
-
-static int ql_get_nvram_params(struct ql3_adapter *qdev)
-{
-	u16 *pEEPROMData;
-	u16 checksum = 0;
-	u32 index;
-	unsigned long hw_flags;
-
-	spin_lock_irqsave(&qdev->hw_lock, hw_flags);
-
-	pEEPROMData = (u16 *)&qdev->nvram_data;
-	qdev->eeprom_cmd_data = 0;
-	if (ql_sem_spinlock(qdev, QL_NVRAM_SEM_MASK,
-			(QL_RESOURCE_BITS_BASE_CODE | (qdev->mac_index) *
-			 2) << 10)) {
-		pr_err("%s: Failed ql_sem_spinlock()\n", __func__);
-		spin_unlock_irqrestore(&qdev->hw_lock, hw_flags);
-		return -1;
-	}
-
-	for (index = 0; index < EEPROM_SIZE; index++) {
-		eeprom_readword(qdev, index, pEEPROMData);
-		checksum += *pEEPROMData;
-		pEEPROMData++;
-	}
-	ql_sem_unlock(qdev, QL_NVRAM_SEM_MASK);
-
-	if (checksum != 0) {
-		netdev_err(qdev->ndev, "checksum should be zero, is %x!!\n",
-			   checksum);
-		spin_unlock_irqrestore(&qdev->hw_lock, hw_flags);
-		return -1;
-	}
-
-	spin_unlock_irqrestore(&qdev->hw_lock, hw_flags);
-	return checksum;
-}
-
-static const u32 PHYAddr[2] = {
-	PORT0_PHY_ADDRESS, PORT1_PHY_ADDRESS
-};
-
-static int ql_wait_for_mii_ready(struct ql3_adapter *qdev)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-	u32 temp;
-	int count = 1000;
-
-	while (count) {
-		temp = ql_read_page0_reg(qdev, &port_regs->macMIIStatusReg);
-		if (!(temp & MAC_MII_STATUS_BSY))
-			return 0;
-		udelay(10);
-		count--;
-	}
-	return -1;
-}
-
-static void ql_mii_enable_scan_mode(struct ql3_adapter *qdev)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-	u32 scanControl;
-
-	if (qdev->numPorts > 1) {
-		/* Auto scan will cycle through multiple ports */
-		scanControl = MAC_MII_CONTROL_AS | MAC_MII_CONTROL_SC;
-	} else {
-		scanControl = MAC_MII_CONTROL_SC;
-	}
-
-	/*
-	 * Scan register 1 of PHY/PETBI,
-	 * Set up to scan both devices
-	 * The autoscan starts from the first register, completes
-	 * the last one before rolling over to the first
-	 */
-	ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
-			   PHYAddr[0] | MII_SCAN_REGISTER);
-
-	ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
-			   (scanControl) |
-			   ((MAC_MII_CONTROL_SC | MAC_MII_CONTROL_AS) << 16));
-}
-
-static u8 ql_mii_disable_scan_mode(struct ql3_adapter *qdev)
-{
-	u8 ret;
-	struct ql3xxx_port_registers __iomem *port_regs =
-					qdev->mem_map_registers;
-
-	/* See if scan mode is enabled before we turn it off */
-	if (ql_read_page0_reg(qdev, &port_regs->macMIIMgmtControlReg) &
-	    (MAC_MII_CONTROL_AS | MAC_MII_CONTROL_SC)) {
-		/* Scan is enabled */
-		ret = 1;
-	} else {
-		/* Scan is disabled */
-		ret = 0;
-	}
-
-	/*
-	 * When disabling scan mode you must first change the MII register
-	 * address
-	 */
-	ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
-			   PHYAddr[0] | MII_SCAN_REGISTER);
-
-	ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
-			   ((MAC_MII_CONTROL_SC | MAC_MII_CONTROL_AS |
-			     MAC_MII_CONTROL_RC) << 16));
-
-	return ret;
-}
-
-static int ql_mii_write_reg_ex(struct ql3_adapter *qdev,
-			       u16 regAddr, u16 value, u32 phyAddr)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-	u8 scanWasEnabled;
-
-	scanWasEnabled = ql_mii_disable_scan_mode(qdev);
-
-	if (ql_wait_for_mii_ready(qdev)) {
-		netif_warn(qdev, link, qdev->ndev, TIMED_OUT_MSG);
-		return -1;
-	}
-
-	ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
-			   phyAddr | regAddr);
-
-	ql_write_page0_reg(qdev, &port_regs->macMIIMgmtDataReg, value);
-
-	/* Wait for write to complete 9/10/04 SJP */
-	if (ql_wait_for_mii_ready(qdev)) {
-		netif_warn(qdev, link, qdev->ndev, TIMED_OUT_MSG);
-		return -1;
-	}
-
-	if (scanWasEnabled)
-		ql_mii_enable_scan_mode(qdev);
-
-	return 0;
-}
-
-static int ql_mii_read_reg_ex(struct ql3_adapter *qdev, u16 regAddr,
-			      u16 *value, u32 phyAddr)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-	u8 scanWasEnabled;
-	u32 temp;
-
-	scanWasEnabled = ql_mii_disable_scan_mode(qdev);
-
-	if (ql_wait_for_mii_ready(qdev)) {
-		netif_warn(qdev, link, qdev->ndev, TIMED_OUT_MSG);
-		return -1;
-	}
-
-	ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
-			   phyAddr | regAddr);
-
-	ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
-			   (MAC_MII_CONTROL_RC << 16));
-
-	ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
-			   (MAC_MII_CONTROL_RC << 16) | MAC_MII_CONTROL_RC);
-
-	/* Wait for the read to complete */
-	if (ql_wait_for_mii_ready(qdev)) {
-		netif_warn(qdev, link, qdev->ndev, TIMED_OUT_MSG);
-		return -1;
-	}
-
-	temp = ql_read_page0_reg(qdev, &port_regs->macMIIMgmtDataReg);
-	*value = (u16) temp;
-
-	if (scanWasEnabled)
-		ql_mii_enable_scan_mode(qdev);
-
-	return 0;
-}
-
-static int ql_mii_write_reg(struct ql3_adapter *qdev, u16 regAddr, u16 value)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-
-	ql_mii_disable_scan_mode(qdev);
-
-	if (ql_wait_for_mii_ready(qdev)) {
-		netif_warn(qdev, link, qdev->ndev, TIMED_OUT_MSG);
-		return -1;
-	}
-
-	ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
-			   qdev->PHYAddr | regAddr);
-
-	ql_write_page0_reg(qdev, &port_regs->macMIIMgmtDataReg, value);
-
-	/* Wait for write to complete. */
-	if (ql_wait_for_mii_ready(qdev)) {
-		netif_warn(qdev, link, qdev->ndev, TIMED_OUT_MSG);
-		return -1;
-	}
-
-	ql_mii_enable_scan_mode(qdev);
-
-	return 0;
-}
-
-static int ql_mii_read_reg(struct ql3_adapter *qdev, u16 regAddr, u16 *value)
-{
-	u32 temp;
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-
-	ql_mii_disable_scan_mode(qdev);
-
-	if (ql_wait_for_mii_ready(qdev)) {
-		netif_warn(qdev, link, qdev->ndev, TIMED_OUT_MSG);
-		return -1;
-	}
-
-	ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
-			   qdev->PHYAddr | regAddr);
-
-	ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
-			   (MAC_MII_CONTROL_RC << 16));
-
-	ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
-			   (MAC_MII_CONTROL_RC << 16) | MAC_MII_CONTROL_RC);
-
-	/* Wait for the read to complete */
-	if (ql_wait_for_mii_ready(qdev)) {
-		netif_warn(qdev, link, qdev->ndev, TIMED_OUT_MSG);
-		return -1;
-	}
-
-	temp = ql_read_page0_reg(qdev, &port_regs->macMIIMgmtDataReg);
-	*value = (u16) temp;
-
-	ql_mii_enable_scan_mode(qdev);
-
-	return 0;
-}
-
-static void ql_petbi_reset(struct ql3_adapter *qdev)
-{
-	ql_mii_write_reg(qdev, PETBI_CONTROL_REG, PETBI_CTRL_SOFT_RESET);
-}
-
-static void ql_petbi_start_neg(struct ql3_adapter *qdev)
-{
-	u16 reg;
-
-	/* Enable Auto-negotiation sense */
-	ql_mii_read_reg(qdev, PETBI_TBI_CTRL, &reg);
-	reg |= PETBI_TBI_AUTO_SENSE;
-	ql_mii_write_reg(qdev, PETBI_TBI_CTRL, reg);
-
-	ql_mii_write_reg(qdev, PETBI_NEG_ADVER,
-			 PETBI_NEG_PAUSE | PETBI_NEG_DUPLEX);
-
-	ql_mii_write_reg(qdev, PETBI_CONTROL_REG,
-			 PETBI_CTRL_AUTO_NEG | PETBI_CTRL_RESTART_NEG |
-			 PETBI_CTRL_FULL_DUPLEX | PETBI_CTRL_SPEED_1000);
-
-}
-
-static void ql_petbi_reset_ex(struct ql3_adapter *qdev)
-{
-	ql_mii_write_reg_ex(qdev, PETBI_CONTROL_REG, PETBI_CTRL_SOFT_RESET,
-			    PHYAddr[qdev->mac_index]);
-}
-
-static void ql_petbi_start_neg_ex(struct ql3_adapter *qdev)
-{
-	u16 reg;
-
-	/* Enable Auto-negotiation sense */
-	ql_mii_read_reg_ex(qdev, PETBI_TBI_CTRL, &reg,
-			   PHYAddr[qdev->mac_index]);
-	reg |= PETBI_TBI_AUTO_SENSE;
-	ql_mii_write_reg_ex(qdev, PETBI_TBI_CTRL, reg,
-			    PHYAddr[qdev->mac_index]);
-
-	ql_mii_write_reg_ex(qdev, PETBI_NEG_ADVER,
-			    PETBI_NEG_PAUSE | PETBI_NEG_DUPLEX,
-			    PHYAddr[qdev->mac_index]);
-
-	ql_mii_write_reg_ex(qdev, PETBI_CONTROL_REG,
-			    PETBI_CTRL_AUTO_NEG | PETBI_CTRL_RESTART_NEG |
-			    PETBI_CTRL_FULL_DUPLEX | PETBI_CTRL_SPEED_1000,
-			    PHYAddr[qdev->mac_index]);
-}
-
-static void ql_petbi_init(struct ql3_adapter *qdev)
-{
-	ql_petbi_reset(qdev);
-	ql_petbi_start_neg(qdev);
-}
-
-static void ql_petbi_init_ex(struct ql3_adapter *qdev)
-{
-	ql_petbi_reset_ex(qdev);
-	ql_petbi_start_neg_ex(qdev);
-}
-
-static int ql_is_petbi_neg_pause(struct ql3_adapter *qdev)
-{
-	u16 reg;
-
-	if (ql_mii_read_reg(qdev, PETBI_NEG_PARTNER, &reg) < 0)
-		return 0;
-
-	return (reg & PETBI_NEG_PAUSE_MASK) == PETBI_NEG_PAUSE;
-}
-
-static void phyAgereSpecificInit(struct ql3_adapter *qdev, u32 miiAddr)
-{
-	netdev_info(qdev->ndev, "enabling Agere specific PHY\n");
-	/* power down device bit 11 = 1 */
-	ql_mii_write_reg_ex(qdev, 0x00, 0x1940, miiAddr);
-	/* enable diagnostic mode bit 2 = 1 */
-	ql_mii_write_reg_ex(qdev, 0x12, 0x840e, miiAddr);
-	/* 1000MB amplitude adjust (see Agere errata) */
-	ql_mii_write_reg_ex(qdev, 0x10, 0x8805, miiAddr);
-	/* 1000MB amplitude adjust (see Agere errata) */
-	ql_mii_write_reg_ex(qdev, 0x11, 0xf03e, miiAddr);
-	/* 100MB amplitude adjust (see Agere errata) */
-	ql_mii_write_reg_ex(qdev, 0x10, 0x8806, miiAddr);
-	/* 100MB amplitude adjust (see Agere errata) */
-	ql_mii_write_reg_ex(qdev, 0x11, 0x003e, miiAddr);
-	/* 10MB amplitude adjust (see Agere errata) */
-	ql_mii_write_reg_ex(qdev, 0x10, 0x8807, miiAddr);
-	/* 10MB amplitude adjust (see Agere errata) */
-	ql_mii_write_reg_ex(qdev, 0x11, 0x1f00, miiAddr);
-	/* point to hidden reg 0x2806 */
-	ql_mii_write_reg_ex(qdev, 0x10, 0x2806, miiAddr);
-	/* Write new PHYAD w/bit 5 set */
-	ql_mii_write_reg_ex(qdev, 0x11,
-			    0x0020 | (PHYAddr[qdev->mac_index] >> 8), miiAddr);
-	/*
-	 * Disable diagnostic mode bit 2 = 0
-	 * Power up device bit 11 = 0
-	 * Link up (on) and activity (blink)
-	 */
-	ql_mii_write_reg(qdev, 0x12, 0x840a);
-	ql_mii_write_reg(qdev, 0x00, 0x1140);
-	ql_mii_write_reg(qdev, 0x1c, 0xfaf0);
-}
-
-static enum PHY_DEVICE_TYPE getPhyType(struct ql3_adapter *qdev,
-				       u16 phyIdReg0, u16 phyIdReg1)
-{
-	enum PHY_DEVICE_TYPE result = PHY_TYPE_UNKNOWN;
-	u32   oui;
-	u16   model;
-	int i;
-
-	if (phyIdReg0 == 0xffff)
-		return result;
-
-	if (phyIdReg1 == 0xffff)
-		return result;
-
-	/* oui is split between two registers */
-	oui = (phyIdReg0 << 6) | ((phyIdReg1 & PHY_OUI_1_MASK) >> 10);
-
-	model = (phyIdReg1 & PHY_MODEL_MASK) >> 4;
-
-	/* Scan table for this PHY */
-	for (i = 0; i < MAX_PHY_DEV_TYPES; i++) {
-		if ((oui == PHY_DEVICES[i].phyIdOUI) &&
-		    (model == PHY_DEVICES[i].phyIdModel)) {
-			netdev_info(qdev->ndev, "Phy: %s\n",
-				    PHY_DEVICES[i].name);
-			result = PHY_DEVICES[i].phyDevice;
-			break;
-		}
-	}
-
-	return result;
-}
-
-static int ql_phy_get_speed(struct ql3_adapter *qdev)
-{
-	u16 reg;
-
-	switch (qdev->phyType) {
-	case PHY_AGERE_ET1011C: {
-		if (ql_mii_read_reg(qdev, 0x1A, &reg) < 0)
-			return 0;
-
-		reg = (reg >> 8) & 3;
-		break;
-	}
-	default:
-		if (ql_mii_read_reg(qdev, AUX_CONTROL_STATUS, &reg) < 0)
-			return 0;
-
-		reg = (((reg & 0x18) >> 3) & 3);
-	}
-
-	switch (reg) {
-	case 2:
-		return SPEED_1000;
-	case 1:
-		return SPEED_100;
-	case 0:
-		return SPEED_10;
-	default:
-		return -1;
-	}
-}
-
-static int ql_is_full_dup(struct ql3_adapter *qdev)
-{
-	u16 reg;
-
-	switch (qdev->phyType) {
-	case PHY_AGERE_ET1011C: {
-		if (ql_mii_read_reg(qdev, 0x1A, &reg))
-			return 0;
-
-		return ((reg & 0x0080) && (reg & 0x1000)) != 0;
-	}
-	case PHY_VITESSE_VSC8211:
-	default: {
-		if (ql_mii_read_reg(qdev, AUX_CONTROL_STATUS, &reg) < 0)
-			return 0;
-		return (reg & PHY_AUX_DUPLEX_STAT) != 0;
-	}
-	}
-}
-
-static int ql_is_phy_neg_pause(struct ql3_adapter *qdev)
-{
-	u16 reg;
-
-	if (ql_mii_read_reg(qdev, PHY_NEG_PARTNER, &reg) < 0)
-		return 0;
-
-	return (reg & PHY_NEG_PAUSE) != 0;
-}
-
-static int PHY_Setup(struct ql3_adapter *qdev)
-{
-	u16   reg1;
-	u16   reg2;
-	bool  agereAddrChangeNeeded = false;
-	u32 miiAddr = 0;
-	int err;
-
-	/*  Determine the PHY we are using by reading the ID's */
-	err = ql_mii_read_reg(qdev, PHY_ID_0_REG, &reg1);
-	if (err != 0) {
-		netdev_err(qdev->ndev, "Could not read from reg PHY_ID_0_REG\n");
-		return err;
-	}
-
-	err = ql_mii_read_reg(qdev, PHY_ID_1_REG, &reg2);
-	if (err != 0) {
-		netdev_err(qdev->ndev, "Could not read from reg PHY_ID_1_REG\n");
-		return err;
-	}
-
-	/*  Check if we have a Agere PHY */
-	if ((reg1 == 0xffff) || (reg2 == 0xffff)) {
-
-		/* Determine which MII address we should be using
-		   determined by the index of the card */
-		if (qdev->mac_index == 0)
-			miiAddr = MII_AGERE_ADDR_1;
-		else
-			miiAddr = MII_AGERE_ADDR_2;
-
-		err = ql_mii_read_reg_ex(qdev, PHY_ID_0_REG, &reg1, miiAddr);
-		if (err != 0) {
-			netdev_err(qdev->ndev,
-				   "Could not read from reg PHY_ID_0_REG after Agere detected\n");
-			return err;
-		}
-
-		err = ql_mii_read_reg_ex(qdev, PHY_ID_1_REG, &reg2, miiAddr);
-		if (err != 0) {
-			netdev_err(qdev->ndev, "Could not read from reg PHY_ID_1_REG after Agere detected\n");
-			return err;
-		}
-
-		/*  We need to remember to initialize the Agere PHY */
-		agereAddrChangeNeeded = true;
-	}
-
-	/*  Determine the particular PHY we have on board to apply
-	    PHY specific initializations */
-	qdev->phyType = getPhyType(qdev, reg1, reg2);
-
-	if ((qdev->phyType == PHY_AGERE_ET1011C) && agereAddrChangeNeeded) {
-		/* need this here so address gets changed */
-		phyAgereSpecificInit(qdev, miiAddr);
-	} else if (qdev->phyType == PHY_TYPE_UNKNOWN) {
-		netdev_err(qdev->ndev, "PHY is unknown\n");
-		return -EIO;
-	}
-
-	return 0;
-}
-
-/*
- * Caller holds hw_lock.
- */
-static void ql_mac_enable(struct ql3_adapter *qdev, u32 enable)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-	u32 value;
-
-	if (enable)
-		value = (MAC_CONFIG_REG_PE | (MAC_CONFIG_REG_PE << 16));
-	else
-		value = (MAC_CONFIG_REG_PE << 16);
-
-	if (qdev->mac_index)
-		ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value);
-	else
-		ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value);
-}
-
-/*
- * Caller holds hw_lock.
- */
-static void ql_mac_cfg_soft_reset(struct ql3_adapter *qdev, u32 enable)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-	u32 value;
-
-	if (enable)
-		value = (MAC_CONFIG_REG_SR | (MAC_CONFIG_REG_SR << 16));
-	else
-		value = (MAC_CONFIG_REG_SR << 16);
-
-	if (qdev->mac_index)
-		ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value);
-	else
-		ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value);
-}
-
-/*
- * Caller holds hw_lock.
- */
-static void ql_mac_cfg_gig(struct ql3_adapter *qdev, u32 enable)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-	u32 value;
-
-	if (enable)
-		value = (MAC_CONFIG_REG_GM | (MAC_CONFIG_REG_GM << 16));
-	else
-		value = (MAC_CONFIG_REG_GM << 16);
-
-	if (qdev->mac_index)
-		ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value);
-	else
-		ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value);
-}
-
-/*
- * Caller holds hw_lock.
- */
-static void ql_mac_cfg_full_dup(struct ql3_adapter *qdev, u32 enable)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-	u32 value;
-
-	if (enable)
-		value = (MAC_CONFIG_REG_FD | (MAC_CONFIG_REG_FD << 16));
-	else
-		value = (MAC_CONFIG_REG_FD << 16);
-
-	if (qdev->mac_index)
-		ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value);
-	else
-		ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value);
-}
-
-/*
- * Caller holds hw_lock.
- */
-static void ql_mac_cfg_pause(struct ql3_adapter *qdev, u32 enable)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-	u32 value;
-
-	if (enable)
-		value =
-		    ((MAC_CONFIG_REG_TF | MAC_CONFIG_REG_RF) |
-		     ((MAC_CONFIG_REG_TF | MAC_CONFIG_REG_RF) << 16));
-	else
-		value = ((MAC_CONFIG_REG_TF | MAC_CONFIG_REG_RF) << 16);
-
-	if (qdev->mac_index)
-		ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value);
-	else
-		ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value);
-}
-
-/*
- * Caller holds hw_lock.
- */
-static int ql_is_fiber(struct ql3_adapter *qdev)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-	u32 bitToCheck = 0;
-	u32 temp;
-
-	switch (qdev->mac_index) {
-	case 0:
-		bitToCheck = PORT_STATUS_SM0;
-		break;
-	case 1:
-		bitToCheck = PORT_STATUS_SM1;
-		break;
-	}
-
-	temp = ql_read_page0_reg(qdev, &port_regs->portStatus);
-	return (temp & bitToCheck) != 0;
-}
-
-static int ql_is_auto_cfg(struct ql3_adapter *qdev)
-{
-	u16 reg;
-	ql_mii_read_reg(qdev, 0x00, &reg);
-	return (reg & 0x1000) != 0;
-}
-
-/*
- * Caller holds hw_lock.
- */
-static int ql_is_auto_neg_complete(struct ql3_adapter *qdev)
-{
-	struct ql3xxx_port_registers __iomem *port_regs =
-			qdev->mem_map_registers;
-	u32 bitToCheck = 0;
-	u32 temp;
-
-	switch (qdev->mac_index) {
-	case 0:
-		bitToCheck = PORT_STATUS_AC0;
-		break;
-	case 1:
-		bitToCheck = PORT_STATUS_AC1;
-		break;
-	}
-
-	temp = ql_read_page0_reg(qdev, &port_regs->portStatus);
-	if (temp &