skge/sky2/mv643xx/pxa168: Move the Marvell Ethernet drivers

Move the Marvell Ethernet drivers into drivers/net/ethernet/marvell/
and make the necessary Kconfig and Makefile changes.

CC: Sachin Sanap <ssanap@marvell.com>
CC: Zhangfei Gao <zgao6@marvell.com>
CC: Philip Rakity <prakity@marvell.com>
CC: Mark Brown <markb@marvell.com>
CC: Lennert Buytenhek <buytenh@marvell.com>
CC: Stephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

1 files changed, 0 insertions, 3020 deletions

diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c
deleted file mode 100644
index 259699983ca..00000000000
--- a/drivers/net/mv643xx_eth.c
+++ /dev/null
@@ -1,3020 +0,0 @@
-/*
- * Driver for Marvell Discovery (MV643XX) and Marvell Orion ethernet ports
- * Copyright (C) 2002 Matthew Dharm <mdharm@momenco.com>
- *
- * Based on the 64360 driver from:
- * Copyright (C) 2002 Rabeeh Khoury <rabeeh@galileo.co.il>
- *		      Rabeeh Khoury <rabeeh@marvell.com>
- *
- * Copyright (C) 2003 PMC-Sierra, Inc.,
- *	written by Manish Lachwani
- *
- * Copyright (C) 2003 Ralf Baechle <ralf@linux-mips.org>
- *
- * Copyright (C) 2004-2006 MontaVista Software, Inc.
- *			   Dale Farnsworth <dale@farnsworth.org>
- *
- * Copyright (C) 2004 Steven J. Hill <sjhill1@rockwellcollins.com>
- *				     <sjhill@realitydiluted.com>
- *
- * Copyright (C) 2007-2008 Marvell Semiconductor
- *			   Lennert Buytenhek <buytenh@marvell.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
- */
-
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-
-#include <linux/init.h>
-#include <linux/dma-mapping.h>
-#include <linux/in.h>
-#include <linux/ip.h>
-#include <linux/tcp.h>
-#include <linux/udp.h>
-#include <linux/etherdevice.h>
-#include <linux/delay.h>
-#include <linux/ethtool.h>
-#include <linux/platform_device.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/spinlock.h>
-#include <linux/workqueue.h>
-#include <linux/phy.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/io.h>
-#include <linux/types.h>
-#include <linux/inet_lro.h>
-#include <linux/slab.h>
-#include <asm/system.h>
-
-static char mv643xx_eth_driver_name[] = "mv643xx_eth";
-static char mv643xx_eth_driver_version[] = "1.4";
-
-
-/*
- * Registers shared between all ports.
- */
-#define PHY_ADDR			0x0000
-#define SMI_REG				0x0004
-#define  SMI_BUSY			0x10000000
-#define  SMI_READ_VALID			0x08000000
-#define  SMI_OPCODE_READ		0x04000000
-#define  SMI_OPCODE_WRITE		0x00000000
-#define ERR_INT_CAUSE			0x0080
-#define  ERR_INT_SMI_DONE		0x00000010
-#define ERR_INT_MASK			0x0084
-#define WINDOW_BASE(w)			(0x0200 + ((w) << 3))
-#define WINDOW_SIZE(w)			(0x0204 + ((w) << 3))
-#define WINDOW_REMAP_HIGH(w)		(0x0280 + ((w) << 2))
-#define WINDOW_BAR_ENABLE		0x0290
-#define WINDOW_PROTECT(w)		(0x0294 + ((w) << 4))
-
-/*
- * Main per-port registers.  These live at offset 0x0400 for
- * port #0, 0x0800 for port #1, and 0x0c00 for port #2.
- */
-#define PORT_CONFIG			0x0000
-#define  UNICAST_PROMISCUOUS_MODE	0x00000001
-#define PORT_CONFIG_EXT			0x0004
-#define MAC_ADDR_LOW			0x0014
-#define MAC_ADDR_HIGH			0x0018
-#define SDMA_CONFIG			0x001c
-#define  TX_BURST_SIZE_16_64BIT		0x01000000
-#define  TX_BURST_SIZE_4_64BIT		0x00800000
-#define  BLM_TX_NO_SWAP			0x00000020
-#define  BLM_RX_NO_SWAP			0x00000010
-#define  RX_BURST_SIZE_16_64BIT		0x00000008
-#define  RX_BURST_SIZE_4_64BIT		0x00000004
-#define PORT_SERIAL_CONTROL		0x003c
-#define  SET_MII_SPEED_TO_100		0x01000000
-#define  SET_GMII_SPEED_TO_1000		0x00800000
-#define  SET_FULL_DUPLEX_MODE		0x00200000
-#define  MAX_RX_PACKET_9700BYTE		0x000a0000
-#define  DISABLE_AUTO_NEG_SPEED_GMII	0x00002000
-#define  DO_NOT_FORCE_LINK_FAIL		0x00000400
-#define  SERIAL_PORT_CONTROL_RESERVED	0x00000200
-#define  DISABLE_AUTO_NEG_FOR_FLOW_CTRL	0x00000008
-#define  DISABLE_AUTO_NEG_FOR_DUPLEX	0x00000004
-#define  FORCE_LINK_PASS		0x00000002
-#define  SERIAL_PORT_ENABLE		0x00000001
-#define PORT_STATUS			0x0044
-#define  TX_FIFO_EMPTY			0x00000400
-#define  TX_IN_PROGRESS			0x00000080
-#define  PORT_SPEED_MASK		0x00000030
-#define  PORT_SPEED_1000		0x00000010
-#define  PORT_SPEED_100			0x00000020
-#define  PORT_SPEED_10			0x00000000
-#define  FLOW_CONTROL_ENABLED		0x00000008
-#define  FULL_DUPLEX			0x00000004
-#define  LINK_UP			0x00000002
-#define TXQ_COMMAND			0x0048
-#define TXQ_FIX_PRIO_CONF		0x004c
-#define TX_BW_RATE			0x0050
-#define TX_BW_MTU			0x0058
-#define TX_BW_BURST			0x005c
-#define INT_CAUSE			0x0060
-#define  INT_TX_END			0x07f80000
-#define  INT_TX_END_0			0x00080000
-#define  INT_RX				0x000003fc
-#define  INT_RX_0			0x00000004
-#define  INT_EXT			0x00000002
-#define INT_CAUSE_EXT			0x0064
-#define  INT_EXT_LINK_PHY		0x00110000
-#define  INT_EXT_TX			0x000000ff
-#define INT_MASK			0x0068
-#define INT_MASK_EXT			0x006c
-#define TX_FIFO_URGENT_THRESHOLD	0x0074
-#define TXQ_FIX_PRIO_CONF_MOVED		0x00dc
-#define TX_BW_RATE_MOVED		0x00e0
-#define TX_BW_MTU_MOVED			0x00e8
-#define TX_BW_BURST_MOVED		0x00ec
-#define RXQ_CURRENT_DESC_PTR(q)		(0x020c + ((q) << 4))
-#define RXQ_COMMAND			0x0280
-#define TXQ_CURRENT_DESC_PTR(q)		(0x02c0 + ((q) << 2))
-#define TXQ_BW_TOKENS(q)		(0x0300 + ((q) << 4))
-#define TXQ_BW_CONF(q)			(0x0304 + ((q) << 4))
-#define TXQ_BW_WRR_CONF(q)		(0x0308 + ((q) << 4))
-
-/*
- * Misc per-port registers.
- */
-#define MIB_COUNTERS(p)			(0x1000 + ((p) << 7))
-#define SPECIAL_MCAST_TABLE(p)		(0x1400 + ((p) << 10))
-#define OTHER_MCAST_TABLE(p)		(0x1500 + ((p) << 10))
-#define UNICAST_TABLE(p)		(0x1600 + ((p) << 10))
-
-
-/*
- * SDMA configuration register default value.
- */
-#if defined(__BIG_ENDIAN)
-#define PORT_SDMA_CONFIG_DEFAULT_VALUE		\
-		(RX_BURST_SIZE_4_64BIT	|	\
-		 TX_BURST_SIZE_4_64BIT)
-#elif defined(__LITTLE_ENDIAN)
-#define PORT_SDMA_CONFIG_DEFAULT_VALUE		\
-		(RX_BURST_SIZE_4_64BIT	|	\
-		 BLM_RX_NO_SWAP		|	\
-		 BLM_TX_NO_SWAP		|	\
-		 TX_BURST_SIZE_4_64BIT)
-#else
-#error One of __BIG_ENDIAN or __LITTLE_ENDIAN must be defined
-#endif
-
-
-/*
- * Misc definitions.
- */
-#define DEFAULT_RX_QUEUE_SIZE	128
-#define DEFAULT_TX_QUEUE_SIZE	256
-#define SKB_DMA_REALIGN		((PAGE_SIZE - NET_SKB_PAD) % SMP_CACHE_BYTES)
-
-
-/*
- * RX/TX descriptors.
- */
-#if defined(__BIG_ENDIAN)
-struct rx_desc {
-	u16 byte_cnt;		/* Descriptor buffer byte count		*/
-	u16 buf_size;		/* Buffer size				*/
-	u32 cmd_sts;		/* Descriptor command status		*/
-	u32 next_desc_ptr;	/* Next descriptor pointer		*/
-	u32 buf_ptr;		/* Descriptor buffer pointer		*/
-};
-
-struct tx_desc {
-	u16 byte_cnt;		/* buffer byte count			*/
-	u16 l4i_chk;		/* CPU provided TCP checksum		*/
-	u32 cmd_sts;		/* Command/status field			*/
-	u32 next_desc_ptr;	/* Pointer to next descriptor		*/
-	u32 buf_ptr;		/* pointer to buffer for this descriptor*/
-};
-#elif defined(__LITTLE_ENDIAN)
-struct rx_desc {
-	u32 cmd_sts;		/* Descriptor command status		*/
-	u16 buf_size;		/* Buffer size				*/
-	u16 byte_cnt;		/* Descriptor buffer byte count		*/
-	u32 buf_ptr;		/* Descriptor buffer pointer		*/
-	u32 next_desc_ptr;	/* Next descriptor pointer		*/
-};
-
-struct tx_desc {
-	u32 cmd_sts;		/* Command/status field			*/
-	u16 l4i_chk;		/* CPU provided TCP checksum		*/
-	u16 byte_cnt;		/* buffer byte count			*/
-	u32 buf_ptr;		/* pointer to buffer for this descriptor*/
-	u32 next_desc_ptr;	/* Pointer to next descriptor		*/
-};
-#else
-#error One of __BIG_ENDIAN or __LITTLE_ENDIAN must be defined
-#endif
-
-/* RX & TX descriptor command */
-#define BUFFER_OWNED_BY_DMA		0x80000000
-
-/* RX & TX descriptor status */
-#define ERROR_SUMMARY			0x00000001
-
-/* RX descriptor status */
-#define LAYER_4_CHECKSUM_OK		0x40000000
-#define RX_ENABLE_INTERRUPT		0x20000000
-#define RX_FIRST_DESC			0x08000000
-#define RX_LAST_DESC			0x04000000
-#define RX_IP_HDR_OK			0x02000000
-#define RX_PKT_IS_IPV4			0x01000000
-#define RX_PKT_IS_ETHERNETV2		0x00800000
-#define RX_PKT_LAYER4_TYPE_MASK		0x00600000
-#define RX_PKT_LAYER4_TYPE_TCP_IPV4	0x00000000
-#define RX_PKT_IS_VLAN_TAGGED		0x00080000
-
-/* TX descriptor command */
-#define TX_ENABLE_INTERRUPT		0x00800000
-#define GEN_CRC				0x00400000
-#define TX_FIRST_DESC			0x00200000
-#define TX_LAST_DESC			0x00100000
-#define ZERO_PADDING			0x00080000
-#define GEN_IP_V4_CHECKSUM		0x00040000
-#define GEN_TCP_UDP_CHECKSUM		0x00020000
-#define UDP_FRAME			0x00010000
-#define MAC_HDR_EXTRA_4_BYTES		0x00008000
-#define MAC_HDR_EXTRA_8_BYTES		0x00000200
-
-#define TX_IHL_SHIFT			11
-
-
-/* global *******************************************************************/
-struct mv643xx_eth_shared_private {
-	/*
-	 * Ethernet controller base address.
-	 */
-	void __iomem *base;
-
-	/*
-	 * Points at the right SMI instance to use.
-	 */
-	struct mv643xx_eth_shared_private *smi;
-
-	/*
-	 * Provides access to local SMI interface.
-	 */
-	struct mii_bus *smi_bus;
-
-	/*
-	 * If we have access to the error interrupt pin (which is
-	 * somewhat misnamed as it not only reflects internal errors
-	 * but also reflects SMI completion), use that to wait for
-	 * SMI access completion instead of polling the SMI busy bit.
-	 */
-	int err_interrupt;
-	wait_queue_head_t smi_busy_wait;
-
-	/*
-	 * Per-port MBUS window access register value.
-	 */
-	u32 win_protect;
-
-	/*
-	 * Hardware-specific parameters.
-	 */
-	unsigned int t_clk;
-	int extended_rx_coal_limit;
-	int tx_bw_control;
-	int tx_csum_limit;
-};
-
-#define TX_BW_CONTROL_ABSENT		0
-#define TX_BW_CONTROL_OLD_LAYOUT	1
-#define TX_BW_CONTROL_NEW_LAYOUT	2
-
-static int mv643xx_eth_open(struct net_device *dev);
-static int mv643xx_eth_stop(struct net_device *dev);
-
-
-/* per-port *****************************************************************/
-struct mib_counters {
-	u64 good_octets_received;
-	u32 bad_octets_received;
-	u32 internal_mac_transmit_err;
-	u32 good_frames_received;
-	u32 bad_frames_received;
-	u32 broadcast_frames_received;
-	u32 multicast_frames_received;
-	u32 frames_64_octets;
-	u32 frames_65_to_127_octets;
-	u32 frames_128_to_255_octets;
-	u32 frames_256_to_511_octets;
-	u32 frames_512_to_1023_octets;
-	u32 frames_1024_to_max_octets;
-	u64 good_octets_sent;
-	u32 good_frames_sent;
-	u32 excessive_collision;
-	u32 multicast_frames_sent;
-	u32 broadcast_frames_sent;
-	u32 unrec_mac_control_received;
-	u32 fc_sent;
-	u32 good_fc_received;
-	u32 bad_fc_received;
-	u32 undersize_received;
-	u32 fragments_received;
-	u32 oversize_received;
-	u32 jabber_received;
-	u32 mac_receive_error;
-	u32 bad_crc_event;
-	u32 collision;
-	u32 late_collision;
-};
-
-struct lro_counters {
-	u32 lro_aggregated;
-	u32 lro_flushed;
-	u32 lro_no_desc;
-};
-
-struct rx_queue {
-	int index;
-
-	int rx_ring_size;
-
-	int rx_desc_count;
-	int rx_curr_desc;
-	int rx_used_desc;
-
-	struct rx_desc *rx_desc_area;
-	dma_addr_t rx_desc_dma;
-	int rx_desc_area_size;
-	struct sk_buff **rx_skb;
-
-	struct net_lro_mgr lro_mgr;
-	struct net_lro_desc lro_arr[8];
-};
-
-struct tx_queue {
-	int index;
-
-	int tx_ring_size;
-
-	int tx_desc_count;
-	int tx_curr_desc;
-	int tx_used_desc;
-
-	struct tx_desc *tx_desc_area;
-	dma_addr_t tx_desc_dma;
-	int tx_desc_area_size;
-
-	struct sk_buff_head tx_skb;
-
-	unsigned long tx_packets;
-	unsigned long tx_bytes;
-	unsigned long tx_dropped;
-};
-
-struct mv643xx_eth_private {
-	struct mv643xx_eth_shared_private *shared;
-	void __iomem *base;
-	int port_num;
-
-	struct net_device *dev;
-
-	struct phy_device *phy;
-
-	struct timer_list mib_counters_timer;
-	spinlock_t mib_counters_lock;
-	struct mib_counters mib_counters;
-
-	struct lro_counters lro_counters;
-
-	struct work_struct tx_timeout_task;
-
-	struct napi_struct napi;
-	u32 int_mask;
-	u8 oom;
-	u8 work_link;
-	u8 work_tx;
-	u8 work_tx_end;
-	u8 work_rx;
-	u8 work_rx_refill;
-
-	int skb_size;
-	struct sk_buff_head rx_recycle;
-
-	/*
-	 * RX state.
-	 */
-	int rx_ring_size;
-	unsigned long rx_desc_sram_addr;
-	int rx_desc_sram_size;
-	int rxq_count;
-	struct timer_list rx_oom;
-	struct rx_queue rxq[8];
-
-	/*
-	 * TX state.
-	 */
-	int tx_ring_size;
-	unsigned long tx_desc_sram_addr;
-	int tx_desc_sram_size;
-	int txq_count;
-	struct tx_queue txq[8];
-};
-
-
-/* port register accessors **************************************************/
-static inline u32 rdl(struct mv643xx_eth_private *mp, int offset)
-{
-	return readl(mp->shared->base + offset);
-}
-
-static inline u32 rdlp(struct mv643xx_eth_private *mp, int offset)
-{
-	return readl(mp->base + offset);
-}
-
-static inline void wrl(struct mv643xx_eth_private *mp, int offset, u32 data)
-{
-	writel(data, mp->shared->base + offset);
-}
-
-static inline void wrlp(struct mv643xx_eth_private *mp, int offset, u32 data)
-{
-	writel(data, mp->base + offset);
-}
-
-
-/* rxq/txq helper functions *************************************************/
-static struct mv643xx_eth_private *rxq_to_mp(struct rx_queue *rxq)
-{
-	return container_of(rxq, struct mv643xx_eth_private, rxq[rxq->index]);
-}
-
-static struct mv643xx_eth_private *txq_to_mp(struct tx_queue *txq)
-{
-	return container_of(txq, struct mv643xx_eth_private, txq[txq->index]);
-}
-
-static void rxq_enable(struct rx_queue *rxq)
-{
-	struct mv643xx_eth_private *mp = rxq_to_mp(rxq);
-	wrlp(mp, RXQ_COMMAND, 1 << rxq->index);
-}
-
-static void rxq_disable(struct rx_queue *rxq)
-{
-	struct mv643xx_eth_private *mp = rxq_to_mp(rxq);
-	u8 mask = 1 << rxq->index;
-
-	wrlp(mp, RXQ_COMMAND, mask << 8);
-	while (rdlp(mp, RXQ_COMMAND) & mask)
-		udelay(10);
-}
-
-static void txq_reset_hw_ptr(struct tx_queue *txq)
-{
-	struct mv643xx_eth_private *mp = txq_to_mp(txq);
-	u32 addr;
-
-	addr = (u32)txq->tx_desc_dma;
-	addr += txq->tx_curr_desc * sizeof(struct tx_desc);
-	wrlp(mp, TXQ_CURRENT_DESC_PTR(txq->index), addr);
-}
-
-static void txq_enable(struct tx_queue *txq)
-{
-	struct mv643xx_eth_private *mp = txq_to_mp(txq);
-	wrlp(mp, TXQ_COMMAND, 1 << txq->index);
-}
-
-static void txq_disable(struct tx_queue *txq)
-{
-	struct mv643xx_eth_private *mp = txq_to_mp(txq);
-	u8 mask = 1 << txq->index;
-
-	wrlp(mp, TXQ_COMMAND, mask << 8);
-	while (rdlp(mp, TXQ_COMMAND) & mask)
-		udelay(10);
-}
-
-static void txq_maybe_wake(struct tx_queue *txq)
-{
-	struct mv643xx_eth_private *mp = txq_to_mp(txq);
-	struct netdev_queue *nq = netdev_get_tx_queue(mp->dev, txq->index);
-
-	if (netif_tx_queue_stopped(nq)) {
-		__netif_tx_lock(nq, smp_processor_id());
-		if (txq->tx_ring_size - txq->tx_desc_count >= MAX_SKB_FRAGS + 1)
-			netif_tx_wake_queue(nq);
-		__netif_tx_unlock(nq);
-	}
-}
-
-
-/* rx napi ******************************************************************/
-static int
-mv643xx_get_skb_header(struct sk_buff *skb, void **iphdr, void **tcph,
-		       u64 *hdr_flags, void *priv)
-{
-	unsigned long cmd_sts = (unsigned long)priv;
-
-	/*
-	 * Make sure that this packet is Ethernet II, is not VLAN
-	 * tagged, is IPv4, has a valid IP header, and is TCP.
-	 */
-	if ((cmd_sts & (RX_IP_HDR_OK | RX_PKT_IS_IPV4 |
-		       RX_PKT_IS_ETHERNETV2 | RX_PKT_LAYER4_TYPE_MASK |
-		       RX_PKT_IS_VLAN_TAGGED)) !=
-	    (RX_IP_HDR_OK | RX_PKT_IS_IPV4 |
-	     RX_PKT_IS_ETHERNETV2 | RX_PKT_LAYER4_TYPE_TCP_IPV4))
-		return -1;
-
-	skb_reset_network_header(skb);
-	skb_set_transport_header(skb, ip_hdrlen(skb));
-	*iphdr = ip_hdr(skb);
-	*tcph = tcp_hdr(skb);
-	*hdr_flags = LRO_IPV4 | LRO_TCP;
-
-	return 0;
-}
-
-static int rxq_process(struct rx_queue *rxq, int budget)
-{
-	struct mv643xx_eth_private *mp = rxq_to_mp(rxq);
-	struct net_device_stats *stats = &mp->dev->stats;
-	int lro_flush_needed;
-	int rx;
-
-	lro_flush_needed = 0;
-	rx = 0;
-	while (rx < budget && rxq->rx_desc_count) {
-		struct rx_desc *rx_desc;
-		unsigned int cmd_sts;
-		struct sk_buff *skb;
-		u16 byte_cnt;
-
-		rx_desc = &rxq->rx_desc_area[rxq->rx_curr_desc];
-
-		cmd_sts = rx_desc->cmd_sts;
-		if (cmd_sts & BUFFER_OWNED_BY_DMA)
-			break;
-		rmb();
-
-		skb = rxq->rx_skb[rxq->rx_curr_desc];
-		rxq->rx_skb[rxq->rx_curr_desc] = NULL;
-
-		rxq->rx_curr_desc++;
-		if (rxq->rx_curr_desc == rxq->rx_ring_size)
-			rxq->rx_curr_desc = 0;
-
-		dma_unmap_single(mp->dev->dev.parent, rx_desc->buf_ptr,
-				 rx_desc->buf_size, DMA_FROM_DEVICE);
-		rxq->rx_desc_count--;
-		rx++;
-
-		mp->work_rx_refill |= 1 << rxq->index;
-
-		byte_cnt = rx_desc->byte_cnt;
-
-		/*
-		 * Update statistics.
-		 *
-		 * Note that the descriptor byte count includes 2 dummy
-		 * bytes automatically inserted by the hardware at the
-		 * start of the packet (which we don't count), and a 4
-		 * byte CRC at the end of the packet (which we do count).
-		 */
-		stats->rx_packets++;
-		stats->rx_bytes += byte_cnt - 2;
-
-		/*
-		 * In case we received a packet without first / last bits
-		 * on, or the error summary bit is set, the packet needs
-		 * to be dropped.
-		 */
-		if ((cmd_sts & (RX_FIRST_DESC | RX_LAST_DESC | ERROR_SUMMARY))
-			!= (RX_FIRST_DESC | RX_LAST_DESC))
-			goto err;
-
-		/*
-		 * The -4 is for the CRC in the trailer of the
-		 * received packet
-		 */
-		skb_put(skb, byte_cnt - 2 - 4);
-
-		if (cmd_sts & LAYER_4_CHECKSUM_OK)
-			skb->ip_summed = CHECKSUM_UNNECESSARY;
-		skb->protocol = eth_type_trans(skb, mp->dev);
-
-		if (skb->dev->features & NETIF_F_LRO &&
-		    skb->ip_summed == CHECKSUM_UNNECESSARY) {
-			lro_receive_skb(&rxq->lro_mgr, skb, (void *)cmd_sts);
-			lro_flush_needed = 1;
-		} else
-			netif_receive_skb(skb);
-
-		continue;
-
-err:
-		stats->rx_dropped++;
-
-		if ((cmd_sts & (RX_FIRST_DESC | RX_LAST_DESC)) !=
-			(RX_FIRST_DESC | RX_LAST_DESC)) {
-			if (net_ratelimit())
-				netdev_err(mp->dev,
-					   "received packet spanning multiple descriptors\n");
-		}
-
-		if (cmd_sts & ERROR_SUMMARY)
-			stats->rx_errors++;
-
-		dev_kfree_skb(skb);
-	}
-
-	if (lro_flush_needed)
-		lro_flush_all(&rxq->lro_mgr);
-
-	if (rx < budget)
-		mp->work_rx &= ~(1 << rxq->index);
-
-	return rx;
-}
-
-static int rxq_refill(struct rx_queue *rxq, int budget)
-{
-	struct mv643xx_eth_private *mp = rxq_to_mp(rxq);
-	int refilled;
-
-	refilled = 0;
-	while (refilled < budget && rxq->rx_desc_count < rxq->rx_ring_size) {
-		struct sk_buff *skb;
-		int rx;
-		struct rx_desc *rx_desc;
-		int size;
-
-		skb = __skb_dequeue(&mp->rx_recycle);
-		if (skb == NULL)
-			skb = dev_alloc_skb(mp->skb_size);
-
-		if (skb == NULL) {
-			mp->oom = 1;
-			goto oom;
-		}
-
-		if (SKB_DMA_REALIGN)
-			skb_reserve(skb, SKB_DMA_REALIGN);
-
-		refilled++;
-		rxq->rx_desc_count++;
-
-		rx = rxq->rx_used_desc++;
-		if (rxq->rx_used_desc == rxq->rx_ring_size)
-			rxq->rx_used_desc = 0;
-
-		rx_desc = rxq->rx_desc_area + rx;
-
-		size = skb->end - skb->data;
-		rx_desc->buf_ptr = dma_map_single(mp->dev->dev.parent,
-						  skb->data, size,
-						  DMA_FROM_DEVICE);
-		rx_desc->buf_size = size;
-		rxq->rx_skb[rx] = skb;
-		wmb();
-		rx_desc->cmd_sts = BUFFER_OWNED_BY_DMA | RX_ENABLE_INTERRUPT;
-		wmb();
-
-		/*
-		 * The hardware automatically prepends 2 bytes of
-		 * dummy data to each received packet, so that the
-		 * IP header ends up 16-byte aligned.
-		 */
-		skb_reserve(skb, 2);
-	}
-
-	if (refilled < budget)
-		mp->work_rx_refill &= ~(1 << rxq->index);
-
-oom:
-	return refilled;
-}
-
-
-/* tx ***********************************************************************/
-static inline unsigned int has_tiny_unaligned_frags(struct sk_buff *skb)
-{
-	int frag;
-
-	for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
-		skb_frag_t *fragp = &skb_shinfo(skb)->frags[frag];
-		if (fragp->size <= 8 && fragp->page_offset & 7)
-			return 1;
-	}
-
-	return 0;
-}
-
-static void txq_submit_frag_skb(struct tx_queue *txq, struct sk_buff *skb)
-{
-	struct mv643xx_eth_private *mp = txq_to_mp(txq);
-	int nr_frags = skb_shinfo(skb)->nr_frags;
-	int frag;
-
-	for (frag = 0; frag < nr_frags; frag++) {
-		skb_frag_t *this_frag;
-		int tx_index;
-		struct tx_desc *desc;
-
-		this_frag = &skb_shinfo(skb)->frags[frag];
-		tx_index = txq->tx_curr_desc++;
-		if (txq->tx_curr_desc == txq->tx_ring_size)
-			txq->tx_curr_desc = 0;
-		desc = &txq->tx_desc_area[tx_index];
-
-		/*
-		 * The last fragment will generate an interrupt
-		 * which will free the skb on TX completion.
-		 */
-		if (frag == nr_frags - 1) {
-			desc->cmd_sts = BUFFER_OWNED_BY_DMA |
-					ZERO_PADDING | TX_LAST_DESC |
-					TX_ENABLE_INTERRUPT;
-		} else {
-			desc->cmd_sts = BUFFER_OWNED_BY_DMA;
-		}
-
-		desc->l4i_chk = 0;
-		desc->byte_cnt = this_frag->size;
-		desc->buf_ptr = dma_map_page(mp->dev->dev.parent,
-					     this_frag->page,
-					     this_frag->page_offset,
-					     this_frag->size, DMA_TO_DEVICE);
-	}
-}
-
-static inline __be16 sum16_as_be(__sum16 sum)
-{
-	return (__force __be16)sum;
-}
-
-static int txq_submit_skb(struct tx_queue *txq, struct sk_buff *skb)
-{
-	struct mv643xx_eth_private *mp = txq_to_mp(txq);
-	int nr_frags = skb_shinfo(skb)->nr_frags;
-	int tx_index;
-	struct tx_desc *desc;
-	u32 cmd_sts;
-	u16 l4i_chk;
-	int length;
-
-	cmd_sts = TX_FIRST_DESC | GEN_CRC | BUFFER_OWNED_BY_DMA;
-	l4i_chk = 0;
-
-	if (skb->ip_summed == CHECKSUM_PARTIAL) {
-		int hdr_len;
-		int tag_bytes;
-
-		BUG_ON(skb->protocol != htons(ETH_P_IP) &&
-		       skb->protocol != htons(ETH_P_8021Q));
-
-		hdr_len = (void *)ip_hdr(skb) - (void *)skb->data;
-		tag_bytes = hdr_len - ETH_HLEN;
-		if (skb->len - hdr_len > mp->shared->tx_csum_limit ||
-		    unlikely(tag_bytes & ~12)) {
-			if (skb_checksum_help(skb) == 0)
-				goto no_csum;
-			kfree_skb(skb);
-			return 1;
-		}
-
-		if (tag_bytes & 4)
-			cmd_sts |= MAC_HDR_EXTRA_4_BYTES;
-		if (tag_bytes & 8)
-			cmd_sts |= MAC_HDR_EXTRA_8_BYTES;
-
-		cmd_sts |= GEN_TCP_UDP_CHECKSUM |
-			   GEN_IP_V4_CHECKSUM   |
-			   ip_hdr(skb)->ihl << TX_IHL_SHIFT;
-
-		switch (ip_hdr(skb)->protocol) {
-		case IPPROTO_UDP:
-			cmd_sts |= UDP_FRAME;
-			l4i_chk = ntohs(sum16_as_be(udp_hdr(skb)->check));
-			break;
-		case IPPROTO_TCP:
-			l4i_chk = ntohs(sum16_as_be(tcp_hdr(skb)->check));
-			break;
-		default:
-			BUG();
-		}
-	} else {
-no_csum:
-		/* Errata BTS #50, IHL must be 5 if no HW checksum */
-		cmd_sts |= 5 << TX_IHL_SHIFT;
-	}
-
-	tx_index = txq->tx_curr_desc++;
-	if (txq->tx_curr_desc == txq->tx_ring_size)
-		txq->tx_curr_desc = 0;
-	desc = &txq->tx_desc_area[tx_index];
-
-	if (nr_frags) {
-		txq_submit_frag_skb(txq, skb);
-		length = skb_headlen(skb);
-	} else {
-		cmd_sts |= ZERO_PADDING | TX_LAST_DESC | TX_ENABLE_INTERRUPT;
-		length = skb->len;
-	}
-
-	desc->l4i_chk = l4i_chk;
-	desc->byte_cnt = length;
-	desc->buf_ptr = dma_map_single(mp->dev->dev.parent, skb->data,
-				       length, DMA_TO_DEVICE);
-
-	__skb_queue_tail(&txq->tx_skb, skb);
-
-	skb_tx_timestamp(skb);
-
-	/* ensure all other descriptors are written before first cmd_sts */
-	wmb();
-	desc->cmd_sts = cmd_sts;
-
-	/* clear TX_END status */
-	mp->work_tx_end &= ~(1 << txq->index);
-
-	/* ensure all descriptors are written before poking hardware */
-	wmb();
-	txq_enable(txq);
-
-	txq->tx_desc_count += nr_frags + 1;
-
-	return 0;
-}
-
-static netdev_tx_t mv643xx_eth_xmit(struct sk_buff *skb, struct net_device *dev)
-{
-	struct mv643xx_eth_private *mp = netdev_priv(dev);
-	int length, queue;
-	struct tx_queue *txq;
-	struct netdev_queue *nq;
-
-	queue = skb_get_queue_mapping(skb);
-	txq = mp->txq + queue;
-	nq = netdev_get_tx_queue(dev, queue);
-
-	if (has_tiny_unaligned_frags(skb) && __skb_linearize(skb)) {
-		txq->tx_dropped++;
-		netdev_printk(KERN_DEBUG, dev,
-			      "failed to linearize skb with tiny unaligned fragment\n");
-		return NETDEV_TX_BUSY;
-	}
-
-	if (txq->tx_ring_size - txq->tx_desc_count < MAX_SKB_FRAGS + 1) {
-		if (net_ratelimit())
-			netdev_err(dev, "tx queue full?!\n");
-		kfree_skb(skb);
-		return NETDEV_TX_OK;
-	}
-
-	length = skb->len;
-
-	if (!txq_submit_skb(txq, skb)) {
-		int entries_left;
-
-		txq->tx_bytes += length;
-		txq->tx_packets++;
-
-		entries_left = txq->tx_ring_size - txq->tx_desc_count;
-		if (entries_left < MAX_SKB_FRAGS + 1)
-			netif_tx_stop_queue(nq);
-	}
-
-	return NETDEV_TX_OK;
-}
-
-
-/* tx napi ******************************************************************/
-static void txq_kick(struct tx_queue *txq)
-{
-	struct mv643xx_eth_private *mp = txq_to_mp(txq);
-	struct netdev_queue *nq = netdev_get_tx_queue(mp->dev, txq->index);
-	u32 hw_desc_ptr;
-	u32 expected_ptr;
-
-	__netif_tx_lock(nq, smp_processor_id());
-
-	if (rdlp(mp, TXQ_COMMAND) & (1 << txq->index))
-		goto out;
-
-	hw_desc_ptr = rdlp(mp, TXQ_CURRENT_DESC_PTR(txq->index));
-	expected_ptr = (u32)txq->tx_desc_dma +
-				txq->tx_curr_desc * sizeof(struct tx_desc);
-
-	if (hw_desc_ptr != expected_ptr)
-		txq_enable(txq);
-
-out:
-	__netif_tx_unlock(nq);
-
-	mp->work_tx_end &= ~(1 << txq->index);
-}
-
-static int txq_reclaim(struct tx_queue *txq, int budget, int force)
-{
-	struct mv643xx_eth_private *mp = txq_to_mp(txq);
-	struct netdev_queue *nq = netdev_get_tx_queue(mp->dev, txq->index);
-	int reclaimed;
-
-	__netif_tx_lock(nq, smp_processor_id());
-
-	reclaimed = 0;
-	while (reclaimed < budget && txq->tx_desc_count > 0) {
-		int tx_index;
-		struct tx_desc *desc;
-		u32 cmd_sts;
-		struct sk_buff *skb;
-
-		tx_index = txq->tx_used_desc;
-		desc = &txq->tx_desc_area[tx_index];
-		cmd_sts = desc->cmd_sts;
-
-		if (cmd_sts & BUFFER_OWNED_BY_DMA) {
-			if (!force)
-				break;
-			desc->cmd_sts = cmd_sts & ~BUFFER_OWNED_BY_DMA;
-		}
-
-		txq->tx_used_desc = tx_index + 1;
-		if (txq->tx_used_desc == txq->tx_ring_size)
-			txq->tx_used_desc = 0;
-
-		reclaimed++;
-		txq->tx_desc_count--;
-
-		skb = NULL;
-		if (cmd_sts & TX_LAST_DESC)
-			skb = __skb_dequeue(&txq->tx_skb);
-
-		if (cmd_sts & ERROR_SUMMARY) {
-			netdev_info(mp->dev, "tx error\n");
-			mp->dev->stats.tx_errors++;
-		}
-
-		if (cmd_sts & TX_FIRST_DESC) {
-			dma_unmap_single(mp->dev->dev.parent, desc->buf_ptr,
-					 desc->byte_cnt, DMA_TO_DEVICE);
-		} else {
-			dma_unmap_page(mp->dev->dev.parent, desc->buf_ptr,
-				       desc->byte_cnt, DMA_TO_DEVICE);
-		}
-
-		if (skb != NULL) {
-			if (skb_queue_len(&mp->rx_recycle) <
-					mp->rx_ring_size &&
-			    skb_recycle_check(skb, mp->skb_size))
-				__skb_queue_head(&mp->rx_recycle, skb);
-			else
-				dev_kfree_skb(skb);
-		}
-	}
-
-	__netif_tx_unlock(nq);
-
-	if (reclaimed < budget)
-		mp->work_tx &= ~(1 << txq->index);
-
-	return reclaimed;
-}
-
-
-/* tx rate control **********************************************************/
-/*
- * Set total maximum TX rate (shared by all TX queues for this port)
- * to 'rate' bits per second, with a maximum burst of 'burst' bytes.
- */
-static void tx_set_rate(struct mv643xx_eth_private *mp, int rate, int burst)
-{
-	int token_rate;
-	int mtu;
-	int bucket_size;
-
-	token_rate = ((rate / 1000) * 64) / (mp->shared->t_clk / 1000);
-	if (token_rate > 1023)
-		token_rate = 1023;
-
-	mtu = (mp->dev->mtu + 255) >> 8;
-	if (mtu > 63)
-		mtu = 63;
-
-	bucket_size = (burst + 255) >> 8;
-	if (bucket_size > 65535)
-		bucket_size = 65535;
-
-	switch (mp->shared->tx_bw_control) {
-	case TX_BW_CONTROL_OLD_LAYOUT:
-		wrlp(mp, TX_BW_RATE, token_rate);
-		wrlp(mp, TX_BW_MTU, mtu);
-		wrlp(mp, TX_BW_BURST, bucket_size);
-		break;
-	case TX_BW_CONTROL_NEW_LAYOUT:
-		wrlp(mp, TX_BW_RATE_MOVED, token_rate);
-		wrlp(mp, TX_BW_MTU_MOVED, mtu);
-		wrlp(mp, TX_BW_BURST_MOVED, bucket_size);
-		break;
-	}
-}
-
-static void txq_set_rate(struct tx_queue *txq, int rate, int burst)
-{
-	struct mv643xx_eth_private *mp = txq_to_mp(txq);
-	int token_rate;
-	int bucket_size;
-
-	token_rate = ((rate / 1000) * 64) / (mp->shared->t_clk / 1000);
-	if (token_rate > 1023)
-		token_rate = 1023;
-
-	bucket_size = (burst + 255) >> 8;
-	if (bucket_size > 65535)
-		bucket_size = 65535;
-
-	wrlp(mp, TXQ_BW_TOKENS(txq->index), token_rate << 14);
-	wrlp(mp, TXQ_BW_CONF(txq->index), (bucket_size << 10) | token_rate);
-}
-
-static void txq_set_fixed_prio_mode(struct tx_queue *txq)
-{
-	struct mv643xx_eth_private *mp = txq_to_mp(txq);
-	int off;
-	u32 val;
-
-	/*
-	 * Turn on fixed priority mode.
-	 */
-	off = 0;
-	switch (mp->shared->tx_bw_control) {
-	case TX_BW_CONTROL_OLD_LAYOUT:
-		off = TXQ_FIX_PRIO_CONF;
-		break;
-	case TX_BW_CONTROL_NEW_LAYOUT:
-		off = TXQ_FIX_PRIO_CONF_MOVED;
-		break;
-	}
-
-	if (off) {
-		val = rdlp(mp, off);
-		val |= 1 << txq->index;
-		wrlp(mp, off, val);
-	}
-}
-
-
-/* mii management interface *************************************************/
-static irqreturn_t mv643xx_eth_err_irq(int irq, void *dev_id)
-{
-	struct mv643xx_eth_shared_private *msp = dev_id;
-
-	if (readl(msp->base + ERR_INT_CAUSE) & ERR_INT_SMI_DONE) {
-		writel(~ERR_INT_SMI_DONE, msp->base + ERR_INT_CAUSE);
-		wake_up(&msp->smi_busy_wait);
-		return IRQ_HANDLED;
-	}
-
-	return IRQ_NONE;
-}
-
-static int smi_is_done(struct mv643xx_eth_shared_private *msp)
-{
-	return !(readl(msp->base + SMI_REG) & SMI_BUSY);
-}
-
-static int smi_wait_ready(struct mv643xx_eth_shared_private *msp)
-{
-	if (msp->err_interrupt == NO_IRQ) {
-		int i;
-
-		for (i = 0; !smi_is_done(msp); i++) {
-			if (i == 10)
-				return -ETIMEDOUT;
-			msleep(10);
-		}
-
-		return 0;
-	}
-
-	if (!smi_is_done(msp)) {
-		wait_event_timeout(msp->smi_busy_wait, smi_is_done(msp),
-				   msecs_to_jiffies(100));
-		if (!smi_is_done(msp))
-			return -ETIMEDOUT;
-	}
-
-	return 0;
-}
-
-static int smi_bus_read(struct mii_bus *bus, int addr, int reg)
-{
-	struct mv643xx_eth_shared_private *msp = bus->priv;
-	void __iomem *smi_reg = msp->base + SMI_REG;
-	int ret;
-
-	if (smi_wait_ready(msp)) {
-		pr_warn("SMI bus busy timeout\n");
-		return -ETIMEDOUT;
-	}
-
-	writel(SMI_OPCODE_READ | (reg << 21) | (addr << 16), smi_reg);
-
-	if (smi_wait_ready(msp)) {
-		pr_warn("SMI bus busy timeout\n");
-		return -ETIMEDOUT;
-	}
-
-	ret = readl(smi_reg);
-	if (!(ret & SMI_READ_VALID)) {
-		pr_warn("SMI bus read not valid\n");
-		return -ENODEV;
-	}
-
-	return ret & 0xffff;
-}
-
-static int smi_bus_write(struct mii_bus *bus, int addr, int reg, u16 val)
-{
-	struct mv643xx_eth_shared_private *msp = bus->priv;
-	void __iomem *smi_reg = msp->base + SMI_REG;
-
-	if (smi_wait_ready(msp)) {
-		pr_warn("SMI bus busy timeout\n");
-		return -ETIMEDOUT;
-	}
-
-	writel(SMI_OPCODE_WRITE | (reg << 21) |
-		(addr << 16) | (val & 0xffff), smi_reg);
-
-	if (smi_wait_ready(msp)) {
-		pr_warn("SMI bus busy timeout\n");
-		return -ETIMEDOUT;
-	}
-
-	return 0;
-}
-
-
-/* statistics ***************************************************************/
-static struct net_device_stats *mv643xx_eth_get_stats(struct net_device *dev)
-{
-	struct mv643xx_eth_private *mp = netdev_priv(dev);
-	struct net_device_stats *stats = &dev->stats;
-	unsigned long tx_packets = 0;
-	unsigned long tx_bytes = 0;
-	unsigned long tx_dropped = 0;
-	int i;
-
-	for (i = 0; i < mp->txq_count; i++) {
-		struct tx_queue *txq = mp->txq + i;
-
-		tx_packets += txq->tx_packets;
-		tx_bytes +=