diff options
author | Santiago Leon <santil@linux.vnet.ibm.com> | 2010-09-03 18:28:09 +0000 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-09-06 18:20:32 -0700 |
commit | c033a6d1390bb6cc0c11c3b4137b856dfd8cb7c8 (patch) | |
tree | ff296183b963b75d0da43e3c809b58083316e3af /drivers/net/ibmveth.c | |
parent | a613f581489aff23189c4945aec9567f6663b0c6 (diff) |
ibmveth: batch rx buffer replacement
At the moment we try and replenish the receive ring on every rx interrupt.
We even have a pool->threshold but aren't using it.
To limit the maximum latency incurred when refilling, change the threshold
from 1/2 to 7/8 and reduce the largest rx pool from 768 buffers to 512 which
should be more than enough.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Santiago Leon <santil@linux.vnet.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ibmveth.c')
-rw-r--r-- | drivers/net/ibmveth.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/net/ibmveth.c b/drivers/net/ibmveth.c index d2cc6d3f401..3515ef318eb 100644 --- a/drivers/net/ibmveth.c +++ b/drivers/net/ibmveth.c @@ -178,7 +178,7 @@ static void ibmveth_init_buffer_pool(struct ibmveth_buff_pool *pool, u32 pool_in pool->size = pool_size; pool->index = pool_index; pool->buff_size = buff_size; - pool->threshold = pool_size / 2; + pool->threshold = pool_size * 7 / 8; pool->active = pool_active; } @@ -315,10 +315,13 @@ static void ibmveth_replenish_task(struct ibmveth_adapter *adapter) adapter->replenish_task_cycles++; - for (i = (IbmVethNumBufferPools - 1); i >= 0; i--) - if(adapter->rx_buff_pool[i].active) - ibmveth_replenish_buffer_pool(adapter, - &adapter->rx_buff_pool[i]); + for (i = (IbmVethNumBufferPools - 1); i >= 0; i--) { + struct ibmveth_buff_pool *pool = &adapter->rx_buff_pool[i]; + + if (pool->active && + (atomic_read(&pool->available) < pool->threshold)) + ibmveth_replenish_buffer_pool(adapter, pool); + } adapter->rx_no_buffer = *(u64*)(((char*)adapter->buffer_list_addr) + 4096 - 8); } |