diff options
| author | Bruce Allan <bruce.w.allan@intel.com> | 2010-01-13 01:52:49 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-01-13 17:12:46 -0800 |
| commit | fddaa1aff881c98f524221236af98ce70dcd04cf (patch) | |
| tree | 49f21c354f986851ab3650d4a9d274b1ed34cc8e /drivers/net/e1000e/e1000.h | |
| parent | 8c47eaa76600cebc4869a42abb4568925ade6c47 (diff) | |
e1000e: MDIO slow mode should always be done for 82577
A previous 82577 workaround that set the MDIO access speed to slow mode for
every PHY register read/write when the cable is unplugged should instead
set the access mode to always be slow before any PHY register access.
Since the mode bit gets cleared when the PHY is reset, set the mode after
every PHY reset.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/e1000e/e1000.h')
| -rw-r--r-- | drivers/net/e1000e/e1000.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h index cebbd9079d5..d6ee28f6ea0 100644 --- a/drivers/net/e1000e/e1000.h +++ b/drivers/net/e1000e/e1000.h @@ -582,7 +582,6 @@ extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data); extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data); -extern s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow); extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw); extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw); extern s32 e1000_check_polarity_82577(struct e1000_hw *hw); |