diff options
| author | Dimitris Michailidis <dm@chelsio.com> | 2010-08-02 13:19:19 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-08-02 16:26:42 -0700 |
| commit | 1ae970e0c047fbb1050865c6cf3ac68c7ca67dba (patch) | |
| tree | 1f33ba36c15425b9e48bd0293760707089eea605 /drivers/net/cxgb4/cxgb4_main.c | |
| parent | 625ac6ae5739b4da9bdfd44cbac2f9b6fec17db3 (diff) | |
cxgb4: get on-chip queue info from FW and create a memory window for them
Get info about the availability of Tx on-chip queues from FW and if they
are supported set up a memory window for them. iw_cxgb4 will be using them.
Move the existing window setup later in the init sequence, after we have
collected the new info.
Signed-off-by: Dimitris Michailidis <dm@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/cxgb4/cxgb4_main.c')
| -rw-r--r-- | drivers/net/cxgb4/cxgb4_main.c | 24 |
1 files changed, 22 insertions, 2 deletions
diff --git a/drivers/net/cxgb4/cxgb4_main.c b/drivers/net/cxgb4/cxgb4_main.c index 0af6d6750a9..47e8936e69c 100644 --- a/drivers/net/cxgb4/cxgb4_main.c +++ b/drivers/net/cxgb4/cxgb4_main.c @@ -2897,6 +2897,21 @@ static void setup_memwin(struct adapter *adap) t4_write_reg(adap, PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_BASE_WIN, 2), (bar0 + MEMWIN2_BASE) | BIR(0) | WINDOW(ilog2(MEMWIN2_APERTURE) - 10)); + if (adap->vres.ocq.size) { + unsigned int start, sz_kb; + + start = pci_resource_start(adap->pdev, 2) + + OCQ_WIN_OFFSET(adap->pdev, &adap->vres); + sz_kb = roundup_pow_of_two(adap->vres.ocq.size) >> 10; + t4_write_reg(adap, + PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_BASE_WIN, 3), + start | BIR(1) | WINDOW(ilog2(sz_kb))); + t4_write_reg(adap, + PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_OFFSET, 3), + adap->vres.ocq.start); + t4_read_reg(adap, + PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_OFFSET, 3)); + } } static int adap_init1(struct adapter *adap, struct fw_caps_config_cmd *c) @@ -2954,7 +2969,6 @@ static int adap_init1(struct adapter *adap, struct fw_caps_config_cmd *c) t4_write_reg(adap, TP_PIO_ADDR, TP_INGRESS_CONFIG); v = t4_read_reg(adap, TP_PIO_DATA); t4_write_reg(adap, TP_PIO_DATA, v & ~CSUM_HAS_PSEUDO_HDR); - setup_memwin(adap); return 0; } @@ -3073,13 +3087,17 @@ static int adap_init0(struct adapter *adap) params[1] = FW_PARAM_PFVF(SQRQ_END); params[2] = FW_PARAM_PFVF(CQ_START); params[3] = FW_PARAM_PFVF(CQ_END); - ret = t4_query_params(adap, 0, 0, 0, 4, params, val); + params[4] = FW_PARAM_PFVF(OCQ_START); + params[5] = FW_PARAM_PFVF(OCQ_END); + ret = t4_query_params(adap, 0, 0, 0, 6, params, val); if (ret < 0) goto bye; adap->vres.qp.start = val[0]; adap->vres.qp.size = val[1] - val[0] + 1; adap->vres.cq.start = val[2]; adap->vres.cq.size = val[3] - val[2] + 1; + adap->vres.ocq.start = val[4]; + adap->vres.ocq.size = val[5] - val[4] + 1; } if (c.iscsicaps) { params[0] = FW_PARAM_PFVF(ISCSI_START); @@ -3139,6 +3157,7 @@ static int adap_init0(struct adapter *adap) } #endif + setup_memwin(adap); return 0; /* @@ -3221,6 +3240,7 @@ static pci_ers_result_t eeh_slot_reset(struct pci_dev *pdev) t4_load_mtus(adap, adap->params.mtus, adap->params.a_wnd, adap->params.b_wnd); + setup_memwin(adap); if (cxgb_up(adap)) return PCI_ERS_RESULT_DISCONNECT; return PCI_ERS_RESULT_RECOVERED; |