diff options
| author | Haojian Zhuang <haojian.zhuang@marvell.com> | 2009-09-10 14:11:44 +0800 |
|---|---|---|
| committer | Eric Miao <eric.y.miao@gmail.com> | 2009-12-01 09:02:38 +0800 |
| commit | 8638fac849c181176324f26b4b82e3b96f378dde (patch) | |
| tree | 32e4a87b36b795881d8dd4fbb92681c875872582 /drivers/mtd | |
| parent | 726de6e16d88986db3102ebe6ae277f73df63eaf (diff) | |
pxa3xx_nand: remove hardcode register address
Although nand controller is same between PXA3xx and MMP, the register space
is different. Remove the hardcode register address setting in pxa3xx_nand.h.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'drivers/mtd')
| -rw-r--r-- | drivers/mtd/nand/pxa3xx_nand.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index a085cd0a6e5..3b4bc54df69 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -85,10 +85,6 @@ #define NDCB0_CMD1_MASK (0xff) #define NDCB0_ADDR_CYC_SHIFT (16) -/* dma-able I/O address for the NAND data and commands */ -#define NDCB0_DMA_ADDR (0x43100048) -#define NDDB_DMA_ADDR (0x43100040) - /* macros for registers read/write */ #define nand_writel(info, off, val) \ __raw_writel((val), (info)->mmio_base + (off)) @@ -124,6 +120,7 @@ struct pxa3xx_nand_info { struct clk *clk; void __iomem *mmio_base; + unsigned long mmio_phys; unsigned int buf_start; unsigned int buf_count; @@ -524,11 +521,11 @@ static void start_data_dma(struct pxa3xx_nand_info *info, int dir_out) if (dir_out) { desc->dsadr = info->data_buff_phys; - desc->dtadr = NDDB_DMA_ADDR; + desc->dtadr = info->mmio_phys + NDDB; desc->dcmd |= DCMD_INCSRCADDR | DCMD_FLOWTRG; } else { desc->dtadr = info->data_buff_phys; - desc->dsadr = NDDB_DMA_ADDR; + desc->dsadr = info->mmio_phys + NDDB; desc->dcmd |= DCMD_INCTRGADDR | DCMD_FLOWSRC; } @@ -1241,6 +1238,7 @@ static int pxa3xx_nand_probe(struct platform_device *pdev) ret = -ENODEV; goto fail_free_res; } + info->mmio_phys = r->start; ret = pxa3xx_nand_init_buff(info); if (ret) |