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authorBrian Norris <computersforpeace@gmail.com>2011-06-23 14:12:08 -0700
committerArtem Bityutskiy <artem.bityutskiy@intel.com>2011-09-11 15:02:13 +0300
commit7854d3f7495b11be1570cd3e2318674d8f9ed797 (patch)
tree78eef0451fbec53ce062a37888ac026f079b56b0 /drivers/mtd/chips
parent15c60a508ab3393e68b7ccb3528981ccacf9c0f9 (diff)
mtd: spelling, capitalization, uniformity
Therefor -> Therefore [Intern], [Internal] -> [INTERN] [REPLACABLE] -> [REPLACEABLE] syndrom, syndom -> syndrome ecc -> ECC buswith -> buswidth endianess -> endianness dont -> don't occures -> occurs independend -> independent wihin -> within erease -> erase blockes -> blocks ... Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Diffstat (limited to 'drivers/mtd/chips')
-rw-r--r--drivers/mtd/chips/jedec_probe.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c
index ea832ea0e4a..d40c410a324 100644
--- a/drivers/mtd/chips/jedec_probe.c
+++ b/drivers/mtd/chips/jedec_probe.c
@@ -1914,7 +1914,7 @@ static void jedec_reset(u32 base, struct map_info *map, struct cfi_private *cfi)
* (oh and incidentaly the jedec spec - 3.5.3.3) the reset
* sequence is *supposed* to be 0xaa at 0x5555, 0x55 at
* 0x2aaa, 0xF0 at 0x5555 this will not affect the AMD chips
- * as they will ignore the writes and dont care what address
+ * as they will ignore the writes and don't care what address
* the F0 is written to */
if (cfi->addr_unlock1) {
DEBUG( MTD_DEBUG_LEVEL3,